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Proceedings of the 11th TRON project International Symposium (1994)
Tokyo, Japan
Dec. 7, 1994 to Dec. 10, 1994
ISSN: 1063-6749
ISBN: 0-8186-6775-3
TABLE OF CONTENTS

Bibliography of the TRON project (1984-1994) (PDF)

K. Sakamura , Dept. of Inf. Sci., Tokyo Univ., Japan
pp. 146-173

Quantitative evaluation of the reliability benefits of maintenance bus implementation (PDF)

H. Shimbo , NTT Network Service Syst. Labs., Tokyo, Japan
E. Masuda , NTT Network Service Syst. Labs., Tokyo, Japan
K. Okada , NTT Network Service Syst. Labs., Tokyo, Japan
pp. 131-139

A 32-bit microprocessor with efficient testable designs, the TX2 (PDF)

Y. Nozuyama , Semicond. Syst. Eng. Center, Toshiba Corp., Kawasaki, Japan
H. Mitani , Semicond. Syst. Eng. Center, Toshiba Corp., Kawasaki, Japan
T. Fukumoto , Semicond. Syst. Eng. Center, Toshiba Corp., Kawasaki, Japan
pp. 122-130

A 32-bit superscalar microprocessor G/sub MICRO//400 for embedded systems (PDF)

J. Korematsu , Syst. LSI Lab., Mitsubishi Electr. Corp., Hyogo, Japan
T. Ueda , Syst. LSI Lab., Mitsubishi Electr. Corp., Hyogo, Japan
M. Matsuo , Syst. LSI Lab., Mitsubishi Electr. Corp., Hyogo, Japan
K. Tani , Syst. LSI Lab., Mitsubishi Electr. Corp., Hyogo, Japan
N. Okumura , Syst. LSI Lab., Mitsubishi Electr. Corp., Hyogo, Japan
K. Ishimi , Syst. LSI Lab., Mitsubishi Electr. Corp., Hyogo, Japan
T. Yoshida , Syst. LSI Lab., Mitsubishi Electr. Corp., Hyogo, Japan
Y. Saito , Syst. LSI Lab., Mitsubishi Electr. Corp., Hyogo, Japan
J. Hinata , Syst. LSI Lab., Mitsubishi Electr. Corp., Hyogo, Japan
pp. 115-121

Experimental implementations of priority inheritance semaphore on ITRON-specification kernel (PDF)

H. Takada , Dept. of Inf. Sci., Tokyo Univ., Japan
K. Sakamura , Dept. of Inf. Sci., Tokyo Univ., Japan
pp. 106-113

Eunice/ITRON: a control system development environment for ITRON machines (PDF)

Y. Kawata , Graduate Sch. of Inf. Syst., Univ. of Electro-Commun., Tokyo, Japan
H. Kobayashi , Graduate Sch. of Inf. Syst., Univ. of Electro-Commun., Tokyo, Japan
A. Yabu , Graduate Sch. of Inf. Syst., Univ. of Electro-Commun., Tokyo, Japan
K. Onogawa , Graduate Sch. of Inf. Syst., Univ. of Electro-Commun., Tokyo, Japan
pp. 91-105

Implementation of a fault tolerant communication platform, the HPT500 (PDF)

Y. Fujino , Div. of Telecommun., Hitachi Ltd., Japan
H. Aoe , Div. of Telecommun., Hitachi Ltd., Japan
I. Minamikawa , Div. of Telecommun., Hitachi Ltd., Japan
pp. 75-80

Implementation of label metaphor using shared interaction object architecture (PDF)

N. Koshizuka , Network Oper. Centre, Tokyo Inst. of Technol., Japan
pp. 52-62

Performance analysis of communication control programs based on CTRON interfaces (PDF)

S. Miyata , NTT Inf. & Commun. Syst. Labs., Kanagawa, Japan
T. Ozawa , NTT Inf. & Commun. Syst. Labs., Kanagawa, Japan
Y. Sadakane , NTT Inf. & Commun. Syst. Labs., Kanagawa, Japan
M. Ohminami , NTT Inf. & Commun. Syst. Labs., Kanagawa, Japan
pp. 43-50

CTRON extended OS application to a gateway system (PDF)

T. Tanaka , NTT Inf. & Commun. Syst. Labs., Kanagawa, Japan
K. Sekino , NTT Inf. & Commun. Syst. Labs., Kanagawa, Japan
Y. Sadakane , NTT Inf. & Commun. Syst. Labs., Kanagawa, Japan
M. Ohminami , NTT Inf. & Commun. Syst. Labs., Kanagawa, Japan
pp. 31-42

A benchmark program and normalization method for evaluating communication systems-oriented realtime OS performance (PDF)

T. Ohkubo , NTT Commun. Switching Labs., Tokyo, Japan
T. Takahashi , NTT Commun. Switching Labs., Tokyo, Japan
S. Futagami , NTT Commun. Switching Labs., Tokyo, Japan
pp. 20-30

After a decade of TRON, what comes next? (PDF)

K. Sakamura , Dept. of Inf. Sci., Tokyo Univ., Japan
pp. 2-16

A fault-tolerant implementation of the CTRON basic operating system (PDF)

B. Benton , Dept. of Design, Tandem Comput. Inc., Austin, TX, USA
pp. 65-74
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