The Community for Technology Leaders
International Workshop on System Level Interconnect Prediction (2011)
San Diego, CA, USA
June 5, 2011 to June 5, 2011
ISBN: 978-1-4577-1240-1
TABLE OF CONTENTS
Papers

Table of content (PDF)

pp. 1-3

Architecture and performance evaluation of 3D CMOS-NEM FPGA (Abstract)

Chen Dong , Department of Electrical and Computer Engineering, University of Illinois at Urbana Champaign
Chen Chen , Department of Electrical Engineering and Computer Science, Stanford University
Subhasish Mitra , Department of Electrical Engineering and Computer Science, Stanford University
Deming Chen , Department of Electrical and Computer Engineering, University of Illinois at Urbana Champaign
pp. 1-8

Reducing energy and increasing performance with traffic optimization in many-core systems (Abstract)

George B. P. Bezerra , Dept. of Computer Science, University of New Mexico, Albuquerque, NM 87131
Stephanie Forrest , Dept. of Computer Science, University of New Mexico, Albuquerque, NM 87131
Payman Zarkesh-Ha , Dept. of Electrical and Computer Engineering, University of New Mexico, Albuquerque, NM 87131
pp. 1-7

Interface optimization for improved routability in chip-package-board co-design (Abstract)

Tilo Meister , Institute of Electromechanical and Electronic Design, Dresden University of Technology, Dresden, Germany
Jens Lienig , Institute of Electromechanical and Electronic Design, Dresden University of Technology, Dresden, Germany
Gisbert Thomke , IBM Deutschland Research & Development GmbH, Boeblingen, Germany
pp. 1-8

Stability and scalability in global routing (Abstract)

Sung Kyu Han , ECE Department, UC San Diego, La Jolla, CA 92093, USA
Kwangok Jeong , ECE Department, UC San Diego, La Jolla, CA 92093, USA
Andrew B. Kahng , ECE Department, UC San Diego, La Jolla, CA 92093, USA
Jingwei Lu , CSE Department, UC San Diego, La Jolla, CA 92093, USA
pp. 1-6

Toward PDN resource estimation: A law of general power density (Abstract)

Kwangok Jeong , ECE Department, UC San Diego, La Jolla, CA 92093, USA
Andrew B. Kahng , ECE and CSE Departments, UC San Diego, La Jolla, CA 92093, USA
pp. 1-6

System interconnect design exploration for embedded MPSoCs (Abstract)

Chen-Ling Chou , Electrical and Computer Engineering, Carnegie Mellon University
Radu Marculescu , Electrical and Computer Engineering, Carnegie Mellon University
Umit Ogras , Intel Corporation
Satrajit Chatterjee , Intel Corporation
Michael Kishinevsky , Intel Corporation
Dmitrii Loukianov , Intel Corporation
pp. 1-8

Distributed power network co-design with on-chip power supplies and decoupling capacitors (Abstract)

Selcuk Kose , Department of Electrical and Computer Engineering, University of Rochester, Rochester, New York 14627
Eby G. Friedman , Department of Electrical and Computer Engineering, University of Rochester, Rochester, New York 14627
pp. 1-5

Impact of nano-scale through-silicon vias on the quality of today and future 3D IC designs (Abstract)

Dae Hyun Kim , School of Electrical and Computer Engineering, Georgia Institute of Technology
Suyoun Kim , School of Electrical and Computer Engineering, Georgia Institute of Technology
Sung Kyu Lim , School of Electrical and Computer Engineering, Georgia Institute of Technology
pp. 1-8

A SAT-based routing algorithm for cross-referencing biochips (Abstract)

Ping-Hung Yuh , Taiwan Semiconductor Manufacturing Company, Taiwan
Cliff Chiung-Yu Lin , Department of Electrical Engineering, Stanford University, Stanford, CA
Tsung-Wei Huang , Department of Computer Science and Information Engineering, National Cheng Kung University, Tainan, Taiwan
Tsung-Yi Ho , Department of Computer Science and Information Engineering, National Cheng Kung University, Tainan, Taiwan
Chia-Lin Yang , Department of Computer Science and Information Engineering, National Taiwan University, Taipei, Taiwan
Yao-Wen Chang , Department of Electrical Engineering and the Graduate Institute of Electronics Engineering, National Taiwan University, Taipei, Taiwan
pp. 1-7

Mobile system considerations for SDRAM interface trends (Abstract)

Andrew B. Kahng , CSE and ECE Depts., UC San Diego, La Jolla, CA 92093, USA
Vaishnav Srinivas , ECE Dept., UC San Diego, La Jolla, CA 92093, USA
pp. 1-8

Performance and power analysis of through silicon via based 3D IC integration (PDF)

Youngmin Kim , School of Electrical and Computer Engineering, UNIST, Ulsan, Republic of Korea 689-798
Myunghwan Ryu , School of Electrical and Computer Engineering, UNIST, Ulsan, Republic of Korea 689-798
Hung Viet Nguyen , School of Electrical and Computer Engineering, UNIST, Ulsan, Republic of Korea 689-798
pp. 1

Simulation based study of on-chip antennas for a reconfigurable hybrid 2D wireless network-on-chip (PDF)

B. Taskin , Department of Electrical and Computer Engineering, Drexel University, Philadelphia, PA, 19104
A. More , Department of Electrical and Computer Engineering, Drexel University, Philadelphia, PA, 19104
pp. 1

Wirelength and congestion estimation for routability-driven placement (PDF)

Laleh Behjat , Department of Electrical and Computer Engineering, Schulich School of Engineering, University of Calgary, Calgary, Alberta
Logan Rakai , Department of Electrical and Computer Engineering, Schulich School of Engineering, University of Calgary, Calgary, Alberta
Yang Yang Li , Department of Electrical and Computer Engineering, Schulich School of Engineering, University of Calgary, Calgary, Alberta
Bill Swartz , InternetCAD.com, Inc., Dallas, TX 75228-2493
pp. 1
99 ms
(Ver 3.3 (11022016))