Development of an optimizing compiler for a Fujitsu fixed-point digital signal processor (Abstract)
Instruction set selection for ASIP design (Abstract)
Automatic detection of recurring operation patterns (Abstract)
A flexible code generation framework for the design of application specific programmable processors (Abstract)
An MPEG-2 decoder case study as a driver for a system level design methodology (Abstract)
Flexible design of SPARC cores: a quantitative study (Abstract)
Multilanguage design of heterogeneous systems (Abstract)
The case for a configure-and-execute paradigm (Abstract)
Designing digital video systems: Modeling and scheduling (Abstract)
Fast prototyping: a system design flow for fast design, prototyping and efficient IP reuse (Abstract)
Optimized rapid prototyping for real-time embedded heterogeneous multiprocessors (Abstract)
Using codesign techniques to support analog functionality (Abstract)
A compilation-based software estimation scheme for hardware/software co-simulation (Abstract)
A probabilistic performance metric for real-time system design (Abstract)
Iterative cache simulation of embedded CPUs with trace stripping (Abstract)
Scheduling hardware/software systems using symbolic techniques (Abstract)
Scheduling with optimized communication for time-triggered embedded systems (Abstract)
Embedded system synthesis under memory constraints (Abstract)
Overhead effects in real-time preemptive schedules (Abstract)
System-level partitioning with uncertainty (Abstract)
Timing-driven HW/SW codesign based on task structuring and process timing simulation (Abstract)
Aspects on system-level design (Abstract)