The Community for Technology Leaders
Proceedings of the International Conference on Hardware and Software (1999)
Rome, Italy
March 3, 1999 to March 3, 1999
ISSN: 1092-6100
ISBN: 1-58113-132-1

Instruction set selection for ASIP design (Abstract)

M. Gschwind , IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA
pp. 7-11

Automatic detection of recurring operation patterns (Abstract)

M. Arnold , Dept. of Electr. Eng., Delft Univ. of Technol., Netherlands
pp. 22-26

Flexible design of SPARC cores: a quantitative study (Abstract)

T. Bautista , Div. of CAD, Univ. of Las Palmas, Spain
pp. 43-47

The case for a configure-and-execute paradigm (Abstract)

F. Vahid , Dept. of Comput. Sci. & Eng., California Univ., Riverside, CA, USA
pp. 59-63

Optimized rapid prototyping for real-time embedded heterogeneous multiprocessors (Abstract)

T. Grandpierre , Inst. Nat. de Recherche en Inf. et Autom., Le Chesnay, France
pp. 74-78

Using codesign techniques to support analog functionality (Abstract)

F.G. Wolff , Dept. of Comput. Eng. & Sci., Case Western Reserve Univ., Cleveland, OH, USA
pp. 79-83

A probabilistic performance metric for real-time system design (Abstract)

T. Zhou , Dept. of Comput. Sci. & Eng., Notre Dame Univ., IN, USA
pp. 90-94

Iterative cache simulation of embedded CPUs with trace stripping (Abstract)

Z. Wu , Dept. of Electr. Eng., Princeton Univ., NJ, USA
pp. 95-99

Scheduling hardware/software systems using symbolic techniques (Abstract)

K. Strehl , Comput. Eng. & Networks Lab., Fed. Inst. of Technol., Zurich, Switzerland
pp. 173-177

Scheduling with optimized communication for time-triggered embedded systems (Abstract)

P. Pop , Dept. of Comput. & Inf. Sci., Linkoping Univ., Sweden
pp. 178-182

Embedded system synthesis under memory constraints (Abstract)

J. Madsen , Dept. of Inf. Technol., Tech. Univ., Lyngby, Denmark
pp. 188-192

Overhead effects in real-time preemptive schedules (Abstract)

D.L. Rhodes , CECOM/RDEC, US Army, USA
pp. 193-197

System-level partitioning with uncertainty (Abstract)

J. Albuquerque , Dept. of Comput. Sci., Univ. Fed. de Minas Gerais, Belo Horizonte, Brazil
pp. 198-202

Timing-driven HW/SW codesign based on task structuring and process timing simulation (Abstract)

D. Ramanathan , Dept. of Inf. & Comput. Sci., California Univ., Irvine, CA, USA
pp. 203-207

Aspects on system-level design (Abstract)

J. Plantin , Radio Technol. Res., Ericsson Radio Syst. AB, Stockholm, Sweden
pp. 209-210
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