Rapid turn-around design style and technology: impact on computer architecture (PDF)

Emerging design style: how does it impact the way we design? (PDF)

Rapid architecture prototyper (RAP) (PDF)

A new method for two dimensional symbolic compaction of IC layout (PDF)

SPARC implementations: ASIC vs. custom design (PDF)

A methodology for quick turn-around of high performance DSP ASICS (PDF)

Towards a consistent view of the design tools and process in distributed problem solving environment (PDF)

An integrated CAD environment for system design (PDF)

The design of an integrated environment for the automated synthesis of small computer systems (PDF)

BOLD: The Boulder Optimal Logic Design system (PDF)

Integrated circuit design productivity advancements in the 1980s and 1990s (PDF)

An integrated CAD system for algorithm-specific IC design (PDF)

Symbolic layout for rapid full-custom prototyping of high-speed telecommunications chips (PDF)

A rapid turn-around system for designing efficient fine grained signal processors (PDF)

Design management in a workstation environment (PDF)

Real-time computing-tri-dimensional computing (PDF)

A floating communication processor architecture in a distributed real-time system (PDF)

G-32-a high performance VSLI 3-D computer (PDF)

Register window management for a real-time multitasking RISC (PDF)

Fault-tolerant real-time task scheduling in the MAFT distributed system (PDF)

Characterization of the faulted behavior of digital computers and fault tolerant systems (PDF)

Time complexity modeling and comparison of parallel architectures for Fourier transform oriented algorithms (PDF)

MPC-multiprocessor C language for consistent abstract shared data type paradigms (PDF)

A dedicated data flow architecture for hardware compilation (PDF)

Hardware support to operations of relational algebra (PDF)

The Cydra 5 Departmental Supercomputer: design philosophies, decisions and trade-offs (PDF)

Engineering design of the CONVEX C2 (PDF)

Design of the Titan graphics supercomputer (PDF)

NS32532: case study in general-purpose microprocessor design tradeoffs (PDF)

HP Precision: a spectrum architecture (PDF)

High-performance architectures (PDF)

The limits of incremental multiprocessors (PDF)

Performance measurement of a shared-memory multiprocessor using hardware instrumentation (PDF)

Improving cache performance by selective cache bypass (PDF)

A decentralized virtual memory scheme implemented on an emulated multiprocessor (PDF)

Application-transparent process-level error recovery for multicomputers (PDF)

Cedar architecture and its software (PDF)

New generation architectures (PDF)

The design of processing elements on a multiprocessor system with a high-bandwidth, high-latency interconnection network (PDF)

Extended ASLM-a reconfigurable database machine (PDF)

A massive memory supercomputer (PDF)

A system design for real-time fault-tolerant computer networks (PDF)

Experiments with a virtual tree machine using transputers (PDF)

Reconfigurable transputer processor architectures (PDF)

Tailoring functional units and memory in a high performance Prolog architecture (PDF)

Instruction set architecture of an efficient pipelined dataflow architecture (PDF)

Extending a Prolog architecture for high performance numeric computations (PDF)

A top-down parsing co-processor for compilation (PDF)

Spatial light modulators for optical computing and information processing (PDF)

Interconnection and systems components for digital optics (PDF)

An optical learning machine (PDF)

Diffractive optical elements (PDF)

A coherent system for performing an optical transform (PDF)

Optical modules for future signal processing systems (PDF)

Space-variant optical parallel logic gate technique and its application to cellular logic architectures (PDF)

Approaches to optical microprogramming (PDF)

Proceedings of the Twenty-Second Annual Hawaii International Conference on System Sciences. Vol.I: Architecture Track (IEEE Cat. No. 89TH0242-8) (PDF)