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2014 IEEE Hot Chips 26 Symposium (HCS) (2014)
Cupertino, CA, USA
Aug. 10, 2014 to Aug. 12, 2014
ISBN: 978-1-4673-8883-2
TABLE OF CONTENTS

Security basics (PDF)

Ruby B. Lee , Princeton University, USA
pp. 1-32

Mobile hardware security (Abstract)

Vikas Chandra , ARM R&D, USA
Rob Aitken , ARM R&D, USA
pp. 1-40

Secure systems design (Abstract)

Leendert Van Doorn , Corporate Fellow, USA
pp. 1-31

University research in hardware security (PDF)

Ruby B. Lee , Princeton University, USA
pp. 1-27

Powering the internet of things (Abstract)

Yogesh Ramadass , Texas Instruments, USA
pp. 1-50

Ultra-low power design approaches for IoT (Abstract)

Massimo Alioto , National University of Singapore (NUS), ECE Department, Singapore
pp. 1-57

Connecting the internet of everything (Abstract)

Mike Stauffer , Qualcomm Atheros, USA
pp. 1-38

IoT device standards (Abstract)

pp. 1-37

SX-ACE processor: NEC's brand-new vector processor (Abstract)

Shintaro Momose , NEC Corporation, IT Platform Division, Manager of SX vector supercomputer development, Japan
pp. 1-27

SPARC64™ XIfx: Fujitsu's next generation processor for HPC (Abstract)

Toshio Yoshida , Next Generation Technical Computing Unit, Fujitsu Limited, Japan
pp. 1-31

CMOS biochips for point-of-care molecular diagnostics (Abstract)

Arjang Hassibi , InSilixa, Inc., Sunnyvale, CA USA
pp. 1-32

ARM next-generation IP supporting Avago high-end networking (Abstract)

Mike Filippo , ARM Lead Architect, USA
David Sonnier , Avago Technologies Lead Architect, USA
pp. 1-21

Design of a high-density SoC FPGA at 20nm (Abstract)

Brad Vest , Altera, San Jose, USA
Sean Atsatt , Altera, San Jose, USA
Mike Hutton , Altera, San Jose, USA
pp. 1-24

SDA: Software-defined accelerator for large-scale DNN systems (Abstract)

Jian Ouyang , Baidu, Inc., China
Shiding Lin , Baidu, Inc., China
Wei Qi , Baidu, Inc., China
Yong Wang , Baidu, Inc., China
Bo Yu , Baidu, Inc., China
Song Jiang , Wayne State University, USA
pp. 1-23

Hardware-accelerated text analytics (Abstract)

R. Polig , IBM Research Zurich, Switzerland
K. Atasu , IBM Research Zurich, Switzerland
C. Hagleitner , IBM Research Zurich, Switzerland
L. Chiticariu , IBM Research Almaden, USA
F. Reiss , IBM Research Almaden, USA
H. Zhu , IBM Research Almaden, USA
P. Hofstee , IBM Research Austin, USA
pp. 1-24

RayChip®: Real-time ray-tracing chip for embedded applications (Abstract)

Woo-Chan Park , Siliconarts, Inc., Korea
Hee-Jin Shin , Siliconarts, Inc., Korea
Byoungok Lee , Siliconarts, Inc., Korea
Hyungmin Yoon , Siliconarts, Inc., Korea
Tack-Don Han , Siliconarts, Inc., Korea
pp. 1-32

The internet of everything (Abstract)

Rob Chandhok , Qualcomm Technologies, Inc., USA
pp. 1-29

Intel C2000 atom microserver power efficient processing for the data center (Abstract)

Brad Burres , Intel Corporation - Server Architecture, USA
Johan van de Groenendaal , Intel Corporation - Server Architecture, USA
Jonathan Robinson , Intel Corporation - Server Architecture, USA
Ian Steiner , Intel Corporation - Server Architecture, USA
pp. 1-25

Performance characteristics of the POWER8 processor (Abstract)

Alex Mericas , Systems Performance, IBM Systems & Technology Group Development, USA
pp. 1-26

M7: Next generation SPARC (Abstract)

Stephen Phillips , SPARC Architecture, Oracle, USA
pp. 1-27

Precision refinement for media-processor SoCs: fp32 -> fp64 on myriad (Abstract)

Tomasz Szydzik , Insititute for Applied Microelectronics, University of Las Palmas of Gran Canaria, Spain
David Moloney , Movidius Ltd., USA
pp. 1

Level-3 BLAS on myriad multi-core media-processor SoC (Abstract)

Tomasz Szydzik , Insititute for Applied Microelectronics, University of Las Palmas of Gran Canaria, Spain
Marius Farcas , Codecart, Italy
Valeriu Ohan , Codecart, Italy
David Moloney , Movidius Ltd., USA
pp. 1

Bridge chip composing a PCIe switch over ethernet to make a seamless disaggregated computer in data-center scale (Abstract)

Takashi Yoshikawa , Green Platform Res. Labs, Japan
Jun Suzuki , Green Platform Res. Labs, Japan
Yoichi Hidaka , System Device Division, USA
Junichi Higuchi , System Device Division, USA
Shinji Abe , IT Platform Division, NEC, India
pp. 1

Low power fixed-latency DSP accelerator with autonomous minimum energy tracking (AMET) (Abstract)

Chung-Hsun Huang , Department of Electrical Engineering, National Chung Cheng University (CCU), Taiwan
Wei-Jen Chen , Department of Electrical Engineering, National Chung Cheng University (CCU), Taiwan
Keng-Jui Chang , Department of Electrical Engineering, National Chung Cheng University (CCU), Taiwan
Yi-Hsun Ting , Deptartment of Computer Science and Information Engineering, CCU, Taiwan
Keng-Chang Hsu , Department of Electrical Engineering, National Chung Cheng University (CCU), Taiwan
Yu-Fu Pan , Department of Electrical Engineering, National Chung Cheng University (CCU), Taiwan
Chao-Chun Chen , Department of Electrical Engineering, National Chung Cheng University (CCU), Taiwan
Yuan-Hua Chu , Information and Communications Research Laboratories (ICL), Industrial Technology Research Institute (ITRI), Taiwan
Tay-Jyi Lin , Deptartment of Computer Science and Information Engineering, CCU, Taiwan
Jinn-Shyan Wang , Department of Electrical Engineering, National Chung Cheng University (CCU), Taiwan
pp. 1

A perpetuum mobile 32bit CPU on 65nm SOTB CMOS technology with reverse-body-bias assisted sleep mode (Abstract)

Shiro Kamohara , Low-power Electronics Association & Project (LEAP), Tsukuba, Japan
Nobuyuki Sugii , Low-power Electronics Association & Project (LEAP), Tsukuba, Japan
Koichiro Ishibashi , The University of Electro-Communications, Tokyo, Japan
Kimiyoshi Usami , Shibaura Institute of Technology, Tokyo, Japan
Hideharu Amano , Keio University, Yokohama, Japan
Kazutoshi Kobayashi , Kyoto Institute of Technology, Japan
Cong-Kha Pham , The University of Electro-Communications, Tokyo, Japan
pp. 1

Memory processing units (Abstract)

Jaikrishnan Menon , UW-Madison, USA
Lorenzo De Carli , UW-Madison, USA
Vijayraghavan Thiruvengadam , UW-Madison, USA
Karthikeyan Sankaralingam , UW-Madison, USA
Cristian Estan , Google, USA
pp. 1

High-level synthesis of memory bound and irregular parallel applications with Bambu (Abstract)

Vito Giovanni Castellana , Pacific Northwest National Laboratory, HPC - Richland, WA, USA
Antonino Tumeo , Pacific Northwest National Laboratory, HPC - Richland, WA, USA
Fabrizio Ferrandi , Politecnico di Milano, DEIB, Italy
pp. 1
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