The Community for Technology Leaders
2013 IEEE Hot Chips 25 Symposium (HCS) (2013)
Stanford University, CA, USA
Aug. 25, 2013 to Aug. 27, 2013
ISBN: 978-1-4673-8881-8
TABLE OF CONTENTS

Welcome from general chairs (Abstract)

Krste Asanovic , UC Berkeley, United States
Jan-Willem van de Waerdt , Cypress Semiconductor, United States
pp. 1-2

Welcome (Abstract)

Michael J Flynn , Maxeler Technologies, United Kingdom
Donald K Newell , Qualcomm, United States
pp. 1-2

HSA queueing (Abstract)

pp. 1-43

Biography (Abstract)

pp. 1-2

NAND technology (Abstract)

Krishna Parat , Intel Corporation, United States
pp. 1-18

Delivering the full potential of PCIe storage (Abstract)

Amber Huffman , Storage Technologies Group, Intel Corporation, United States
pp. 1-24

Flash trends: Challenges and future (Abstract)

John D. Davis , Microsoft Researcher - Silicon Valley, United States
Laura Caulfield , UCSD, United States
Steve Swanson , UCSD, United States
pp. 1-42

Flash adoption in the enterprise (Abstract)

David Flynn , Primary Data, United States
pp. 1-15

The chip design game at the end of Moore's law (Abstract)

Robert Colwell , Microsystems Technology Office, DARPA, United States
pp. 1-16

POWER8 (Abstract)

Jeff Stuecheli , IBM Power Systems, IBM Systems & Technology Group Development, United States
pp. 1-20

IBM zEC12 processor subsystem (Abstract)

Robert Sonnelitter , System z Processor Development, Systems & Technology Group, IBM Corp., United States
pp. 1-25

Being in the moment with Google glass (Abstract)

Babak A. Parviz , Google X, United States
pp. 1-22

Dataflow architectures for 10Gbps line-rate key-value-stores (Abstract)

Michaela Blott , Xilinx Research, United States
Kees Vissers , Xilinx Research, United States
pp. 1-25

Going to the wire: The next generation financial risk management platform (Abstract)

Ari Studnitzer , Platform Development, CME Group, United States
Oskar Mencer , Maxeler, United States
pp. 1-26

An FPGA-based in-line accelerator for Memcached (Abstract)

Maysam Lavasani , The University Of Texas At Austin, United States
Hari Angepat , The University Of Texas At Austin, United States
Derek Chiou , The University Of Texas At Austin, United States
pp. 1-23

Second generation bandwidth Engine® IC breaks 4.5 billion accesses/sec (Abstract)

Michael J. Miller , Technology Innovation & System Applications, United States
pp. 1-21

The use and abuse of patents in the semiconductor industry (Abstract)

Michael Brody , Intellectual Property Group, Winston & Strawn, LLP, Chicago, United States
pp. 1-79

Qualcomm Hexagon DSP: An architecture optimized for mobile multimedia and communications (Abstract)

Lucian Codrescu , Technology Qualcomm Technologies, Inc., United States
pp. 1-23

Microprocessors for roots-of-trust (Abstract)

Kristopher Carver , BlueRISC, Inc., United States
pp. 1-17

SPARC64? X+: Fujitsu's next generation processor for UNIX servers (Abstract)

Toshio Yoshida , Development Division, Enterprise Server Business Unit, Fujitsu Limited, Japan
pp. 1-25

Measuring the gap between programmable and fixed-function accelerators: A case study on speech recognition (Abstract)

Yunsup Lee , University of California, Berkeley, United States
David Sheffield , University of California, Berkeley, United States
Andrew Waterman , University of California, Berkeley, United States
Michael Anderson , University of California, Berkeley, United States
Kurt Keutzer , University of California, Berkeley, United States
Krste Asanovic , University of California, Berkeley, United States
pp. 1-2

A scalable 3D heterogeneous multi-core processor with inductive-coupling thruchip interface (Abstract)

Noriyuki Miura , Keio Univ., Japan
Yusuke Koizumi , Keio Univ., Japan
Eiichi Sasaki , Keio Univ., Japan
Yasuhiro Take , Keio Univ., Japan
Hiroki Matsutani , Keio Univ., Japan
Tadahiro Kuroda , Keio Univ., Japan
Hideharu Amano , Keio Univ., Japan
Ryuichi Sakamoto , Tokyo Univ. of Agri. And Tech., Japan
Mitaro Namiki , Tokyo Univ. of Agri. And Tech., Japan
Kimiyoshi Usami , Shibaura Institute of Technology, Japan
Masaaki Kondo , University of Electro-Communications, Japan
Hiroshi Nakamura , University of Tokyo, Japan
pp. 1

ESESC: A fast performance, power, and temperature multicore simulator (Abstract)

Ehsan K. Ardestani , Dept. Computer Engineering, University of California, Santa Cruz, United States
Gabriel Southern , Dept. Computer Engineering, University of California, Santa Cruz, United States
Jason Doung , Dept. Computer Engineering, University of California, Santa Cruz, United States
Elnaz Ebrahimi , Dept. Computer Engineering, University of California, Santa Cruz, United States
Jose Renau , Dept. Computer Engineering, University of California, Santa Cruz, United States
pp. 1

Automatic number plate recognition system on an ARM-DSP and FPGA heterogeneous SoC platforms (Abstract)

Zoe Jeffrey , University of Hertfordshire, Hatfield, UK, AL10 9AB
Xiaojun Zhai , University of Hertfordshire, Hatfield, UK, AL10 9AB
Faycal Bensaali , University of Hertfordshire, Hatfield, UK, AL10 9AB
Reza Sotudeh , University of Hertfordshire, Hatfield, UK, AL10 9AB
Aladdin Ariyaeeinia , University of Hertfordshire, Hatfield, UK, AL10 9AB
pp. 1-9
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