The Community for Technology Leaders
2009 IEEE Hot Chips 21 Symposium (HCS) (2009)
Stanford, CA, USA
Aug. 23, 2009 to Aug. 25, 2009
ISBN: 978-1-4673-8873-3

Tutorial #1: Modern system interconnects (PDF)

Jose Duato , HyperTransport Consortium, USA
Bob Safranek , Intel, USA
Jasmin Ajanovic , Intel, USA
pp. 1-7

HyperTransport? technology tutorial (Abstract)

Jose Duato , Technical University of Valencia, Spain
pp. 1-53

PCI express 3.0 overview (Abstract)

Jasmin Ajanovic , Intel Corp., USA
pp. 1-61

OpenCL (Abstract)

pp. 1-4

Khronos and the OpenCL standard (Abstract)

Neil Trevett , Khronos Group, USA
pp. 1-12

The OpenCL specification (Abstract)

Aaftab Munshi , Khronos OpenCL Working Group, USA
pp. 1-314

AMD and OpenCL (Abstract)

Mike Houston , Advanced Micro Devices, Inc., USA
pp. 1-25

OpenCL*, heterogeneous computing, and the CPU (Abstract)

Tim Mattson , Visual Applications Research lab, Intel Corporation, USA
pp. 1-26

OpenCL for NVIDIA GPUs (Abstract)

Chris Lamb , NVIDIA, USA
pp. 1-24

OpenCL in handheld devices (Abstract)

Kari Pulli , Nokia Research Center Palo Alto, USA
pp. 1-20

Nahalem-EX CPU architecture (Abstract)

Sailesh Kottapalli , Intel, USA
Jeff Baxter , Intel, USA
pp. 1-19

Innovation envelope: Hot chips in blades (Abstract)

Kevin Leigh , BladeSystem, USA
pp. 1-19

Universal parallel computing research center at Illinois (Abstract)

Marc Snir , UPORO Illinois, Universal parallel Computing Research Center, USA
pp. 1-36

The stanford pervasive parallelism lab (Abstract)

Christos Kozyrakis , Pervasive Parallelism Laboratory, USA
Kunle Olukotun , Pervasive Parallelism Laboratory, USA
pp. 1-29

OMAP4430 architecture and development (Abstract)

David Witt , Texas Instruments, USA
pp. 1-16

NVIDIA® Ion (Abstract)

Sridhar Pursai , NVIDIA MCP, USA
pp. 1-28

SPARC64? VIIIfx: Fujitsu's new generation octo core processor for PETA scale computing (Abstract)

Takumi Maruyama , LSI Development Division, Next Generation Technical Computing Unit, Fujitsu Limited, Japan
pp. 1-21

Programming the Nallatech Xeon + multi-FPGA heterogeneous platform (Abstract)

Paul Chow , University of Toronto, ArchES Computing Systems, Canada
Manuel Saldana , University of Toronto, ArchES Computing Systems, Canada
Arun Patel , University of Toronto, ArchES Computing Systems, Canada
Chris Madill , University of Toronto, ArchES Computing Systems, Canada
pp. 1-16

PNX85500 single chip LCD TV system with integrated 120Hz HD frame rate converter (Abstract)

Colin Osborne , PNX85500 Single Chip LCD TV System, USA
Ralf Karge , PNX85500 Single Chip LCD TV System, USA
pp. 1-24

IMAPCAR2: A dynamic SIMD/MIMD mode switching processor for embedded systems (Abstract)

Shorin Kyo , NEC Corporation, Japan
Shouhei Nomoto , NEC Corporation, Japan
Takuya Koga , NEC Electronics Corporation, Japan
Hanno Lieske , NEC Corporation, Japan
Shinichiro Okazaki , NEC Corporation, Japan
pp. 1-33

SoC for car navigation systems with a 53.3 GOPS image recognition engine (Abstract)

Hideaki Kido , Hitachi Ltd., Japan
Shoji Muramatsu , Hitachi Ltd., Japan
Yasuhiko Hoshi , Renesas Technology Corporation, Japan
Hiroyuki Hamasaki , Renesas Technology Corporation, Japan
Atsuhi Nakamura , Renesas Technology Corporation, Japan
Akihiro Yamamoto , Renesas Technology Corporation, Japan
pp. 1-22

Ultra low power FPGA fuels faster feature evolution in mobile applications (Abstract)

John Birkner , Strategic marketing, SiliconBlue Technologies, USA
pp. 1-22

Xilinx Virtex-6 and Spartan-6 FPGA families (Abstract)

Peter Alfke , Xilinx, Inc, USA
pp. 1-20

Rainbow falls sun's next generation CMT processor (Abstract)

Sanjay Patel , Sun Microsystems, USA
pp. 1-19

Technology scaling at an inflexion point: What next? (FPGA perspective) (Abstract)

Michael J. Hart , Silicon Technology Group, Xilinx Inc., USA
pp. 1-6
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