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2018 IEEE 29th International Conference on Application-specific Systems, Architectures and Processors (ASAP) (2018)
Milano, Italy
July 10, 2018 to July 12, 2018
ISSN: 2160-052X
ISBN: 978-1-5386-7480-2
TABLE OF CONTENTS

[Title page] (PDF)

pp. 1

Platinum Sponsors (PDF)

pp. xii-xiii

Table of Contents (PDF)

pp. xv-xvii

Author Index (PDF)

pp. 277-279

A Configurable Framework for Hough-Transform-Based Embedded Object Recognition Systems (Abstract)

Julian Sarche , University of Applied Sciences Augsburg, Efficient Embedded Systems Group An, der Hochschule 1, Augsburg, 86161, Germany
Christian Scheglmann , University of Applied Sciences Augsburg, Efficient Embedded Systems Group An, der Hochschule 1, Augsburg, 86161, Germany
Alexander Zoellner , University of Applied Sciences Augsburg, Efficient Embedded Systems Group An, der Hochschule 1, Augsburg, 86161, Germany
Tim Dolereit , IGD Dept., Maritime Graphics, Fraunhofer Institute for Computer Graphics Research, Joachim-Jungius-Str. 11, Rostock, 18059, Germany
Michael Schaeferling , University of Applied Sciences Augsburg, Efficient Embedded Systems Group An, der Hochschule 1, Augsburg, 86161, Germany
Matthias Vahl , IGD Dept., Maritime Graphics, Fraunhofer Institute for Computer Graphics Research, Joachim-Jungius-Str. 11, Rostock, 18059, Germany
Gundolf Kiefer , University of Applied Sciences Augsburg, Efficient Embedded Systems Group An, der Hochschule 1, Augsburg, 86161, Germany
pp. 1-8

Five-point algorithm: An efficient cloud-based FPGA implementation (Abstract)

Marco Rabozzi , Dipartimento di Elettronica, Informazione e Bioingegneria, Politecnico di Milano, Milano, Italy
Emanuele Del Sozzo , Dipartimento di Elettronica, Informazione e Bioingegneria, Politecnico di Milano, Milano, Italy
Lorenzo Di Tucci , Dipartimento di Elettronica, Informazione e Bioingegneria, Politecnico di Milano, Milano, Italy
Marco D. Santambrogio , Dipartimento di Elettronica, Informazione e Bioingegneria, Politecnico di Milano, Milano, Italy
pp. 1-8

Real-Time High-Quality Stereo Matching System on a GPU (Abstract)

Qiong Chang , Grad. of Systems and Information Engineering, University of Tsukuba, 1-1-1 Ten-nou-dai Tsukuba, Japan
Tsutomu Maruyama , Grad. of Systems and Information Engineering, University of Tsukuba, 1-1-1 Ten-nou-dai Tsukuba, Japan
pp. 1-8

Implementing and Parallelizing Real-time Lane Detection on Heterogeneous Platforms (Abstract)

Xiebing Wang , Department of Informatics, Technical University of Munich, Munich, Germany
Christopher Kiwus , Department of Informatics, Technical University of Munich, Munich, Germany
Canhao Wu , College of Information Science & Technology, Beijing University of Chemical Technology, Beijing, China
Biao Hu , College of Information Science & Technology, Beijing University of Chemical Technology, Beijing, China
Kai Huang , Department of Computer Science, Sun Yat-Sen University, Guangzhou, China
Alois Knoll , Department of Informatics, Technical University of Munich, Munich, Germany
pp. 1-8

From Tensor Algebra to Hardware Accelerators: Generating Streaming Architectures for Solving Partial Differential Equations (Abstract)

Francis P. Russell , Department of Computing, Imperial College London, London, SW7 2AZ, UK
James Stanley Targett , Department of Computing, Imperial College London, London, SW7 2AZ, UK
Wayne Luk , Department of Computing, Imperial College London, London, SW7 2AZ, UK
pp. 1-8

A Unified Backend for Targeting FPGAs from DSLs (Abstract)

Emanuele Del Sozzo , DEIB, Politecnico, Di Milano, Italy
Riyadh Baghdadi , CSAIL, Massachusetts Institute of Technology, USA
Saman Amarasinghe , CSAIL, Massachusetts Institute of Technology, USA
Marco D. Santambrogio , DEIB, Politecnico, Di Milano, Italy
pp. 1-8

Solving Maxwell's Equations with Modern C++ and SYCL: A Case Study (Abstract)

Ayesha Afzal , Hardware/Software Co-Design, Friedrich-Alexander university Erlangen-Nurnberg
Christian Schmitt , Hardware/Software Co-Design, Friedrich-Alexander university Erlangen-Nurnberg
Samer Alhaddad , Department of Theoretical Electrical Engineering, Paderborn University
Yevgen Grynko , Department of Theoretical Electrical Engineering, Paderborn University
Jurgen Teich , Hardware/Software Co-Design, Friedrich-Alexander university Erlangen-Nurnberg
Jens Forstner , Department of Theoretical Electrical Engineering, Paderborn University
Frank Hannig , Hardware/Software Co-Design, Friedrich-Alexander university Erlangen-Nurnberg
pp. 1-8

Low-power Design of a Gravity Rotation Module for HAR Systems Based on Inertial Sensors (Abstract)

Antonio De Vita , Dept. of Industrial Engineering, University of Salerno, Fisciano, SA, 84084, Italy
Gian Domenico Licciardo , Dept. of Industrial Engineering, University of Salerno, Fisciano, SA, 84084, Italy
Luigi Di Benedetto , Dept. of Industrial Engineering, University of Salerno, Fisciano, SA, 84084, Italy
Danilo Pau , ST Microelectronics, Advanced System Technology, Agrate Brianza, MB, 20864, Italy
Emanuele Plebani , ST Microelectronics, Advanced System Technology, Agrate Brianza, MB, 20864, Italy
Angelo Bosco , ST Microelectronics, Advanced System Technology, Agrate Brianza, MB, 20864, Italy
pp. 1-4

A Reading Comprehension Style Question Answering Model Based On Attention Mechanism (Abstract)

Linlong Xiao , College of Computer and Information Science, Southwest University
Nanzhi Wang , College of Computer and Information Science, Southwest University
Guocai Yang , College of Computer and Information Science, Southwest University
pp. 1-4

Linux synchronization barrier on MPSoC: Hardware/software accurate study and optimization (Abstract)

Maxime France-Pillois , Univ. Grenoble Alpes, Grenoble, F-38000, France
Jerome Martin , Univ. Grenoble Alpes, Grenoble, F-38000, France
Frederic Rousseau , CNRS Grenoble INP, TIMA, Univ. Grenoble Alpes, Grenoble, F-38000, France
pp. 1-4

GAP-8: A RISC-V SoC for AI at the Edge of the IoT (Abstract)

Eric Flamand , GreenWaves Technologies, Villard-Bonnot, France
Davide Rossi , GreenWaves Technologies, Villard-Bonnot, France
Francesco Conti , DEI, University of Bologna
Igor Loi , GreenWaves Technologies, Villard-Bonnot, France
Antonio Pullini , GreenWaves Technologies, Villard-Bonnot, France
Florent Rotenberg , GreenWaves Technologies, Villard-Bonnot, France
Luca Benini , DEI, University of Bologna
pp. 1-4

An Explicitly Parallel Architecture for Packet Parsing in Software Defined Networks (Abstract)

Hesam Zolfaghari , Laboratory of Electronics and Communications Engineering, Tampere University of Technology, Tampere, Finland
Davide Rossi , Department of Electrical, Electronic and Information Engineering, University of Bologna, Bologna, Italy
Jari Nurmi , Laboratory of Electronics and Communications, Engineering Tampere University of Technology, Tampere, Finland
pp. 1-4

A Real-Time Learning-Based Super-Resolution System Using Direct Simple Functions (Abstract)

Daolu Zha , School of Physical Sciences, University of Science and Technology of China, Hefei, China
Xi Jin , School of Physical Sciences, University of Science and Technology of China, Hefei, China
Rui Shang , Suzhou Graphichina Microelectronics Technology Co., Ltd., Suzhou, China
Pengfei Yang , School of Physical Sciences, University of Science and Technology of China, Hefei, China
pp. 1-4

Enhanced Visual Loop Closing for Laser-Based SLAM (Abstract)

Zulun Zhu , State Key Laboratory of High Performance Computing (HPCL) and College of Computer, National University of Defense Technology, Changsha, China
Shaowu Yang , State Key Laboratory of High Performance Computing (HPCL) and College of Computer, National University of Defense Technology, Changsha, China
Huadong Dai , Artificial Intelligence Research Center, National Innovation Institute of Defense Technology, Beijing, China
pp. 1-4

Touch-based Smartphone Authentication Using Import Vector Domain Description (Abstract)

Bin Zou , College of Computer and Information Sciences, Southwest University, Chongqing, 400715, China
Yantao Li , College of Computer and Information Sciences, Southwest University, Chongqing, 400715, China
pp. 1-4

Resource-efficient Reconfigurable Computer-on-Module for Embedded Vision Applications (Abstract)

Daniel Klimeck , CITEC, Bielefeld University, Germany Biomechatronics and Embedded Systems Group, University of Applied Sciences, Cognitronics and Sensor Systems Group, Bielefeld, Germany
Hanno Gerd Meyer , CITEC, Bielefeld University, Germany Biomechatronics and Embedded Systems Group, University of Applied Sciences, Cognitronics and Sensor Systems Group, Bielefeld, Germany
Jens Hagemeyer , CITEC, Bielefeld University, Germany Biomechatronics and Embedded Systems Group, University of Applied Sciences, Cognitronics and Sensor Systems Group, Bielefeld, Germany
Mario Porrmann , CITEC, Bielefeld University, Germany Biomechatronics and Embedded Systems Group, University of Applied Sciences, Cognitronics and Sensor Systems Group, Bielefeld, Germany
Ulrich Ruckert , CITEC, Bielefeld University, Germany Biomechatronics and Embedded Systems Group, University of Applied Sciences, Cognitronics and Sensor Systems Group, Bielefeld, Germany
pp. 1-4

Simple Instruction-Set Computer for Area and Energy-Sensitive IoT Edge Devices (Abstract)

Kaoru Saso , School of Engineering, Tokyo Institute of Technology, Japan
Yuko Hara-Azumi , School of Engineering, Tokyo Institute of Technology, Japan
pp. 1-4

Performance Estimation of Deeply Pipelined Fluid Simulation on Multiple FPGAs with High-speed Communication Subsystem (Abstract)

Antoniette Mondigo , Graduate School of Information Sciences, Tohoku University Sendai, Miyagi, Japan
Kentaro Sano , Processor Research Team RIKEN R-CCS Kobe, Hyogo, Japan
Hirovuki Takizawa , Graduate School of Information Sciences, Tohoku University Sendai, Miyagi, Japan
pp. 1-4

Data-flow Aware CNN Accelerator with Hybrid Wireless Interconnection (Abstract)

Mitali Sinha , IIIT Delhi, New Delhi, India
Sri Harsha Gade , IIIT Delhi, New Delhi, India
Wazir Singh , IIIT Delhi, New Delhi, India
Sujay Deb , IIIT Delhi, New Delhi, India
pp. 1-4

A Scalable FPGA Design for Cloud N-Body Simulation (Abstract)

Emanuele Del Sozzo , Italy Dipartimento di Elettronica, Informazione e Bioingegneria, Politecnico di Milano
Marco Rabozzi , Italy Dipartimento di Elettronica, Informazione e Bioingegneria, Politecnico di Milano
Lorenzo Di Tucci , Italy Dipartimento di Elettronica, Informazione e Bioingegneria, Politecnico di Milano
Donatella Sciuto , Italy Dipartimento di Elettronica, Informazione e Bioingegneria, Politecnico di Milano
Marco D. Santambrogio , Italy Dipartimento di Elettronica, Informazione e Bioingegneria, Politecnico di Milano
pp. 1-8

Design Space Exploration for Orlando Ultra Low-Power Convolutional Neural Network SoC (Abstract)

Ahmet Erdem , DEIB, Politecnico di Milano, Milan, Italy
Cristina Silvano , STMicroelectronics, Geneva, Switzerland
Thomas Boesch , STMicroelectronics, Cornaredo, italy
Andrea Ornstein , STMicroelectronics, Cornaredo, italy
Surinder-Pal Singh , STMicroelectronics, Greater Noida, India
Giuseppe Desoli , STMicroelectronics, Cornaredo, italy
pp. 1-7

Hardware Compilation of Deep Neural Networks: An Overview (Abstract)

Ruizhe Zhao , Imperial College London, London, United Kingdom
Shuanglong Liu , Imperial College London, London, United Kingdom
Ho-Cheung Ng , Imperial College London, London, United Kingdom
Erwei Wang , Imperial College London, London, United Kingdom
James J. Davis , Imperial College London, London, United Kingdom
Xinyu Niu , Corerain Technologies Ltd., Shenzhen, China
Xiwei Wang , China Academy of Space Technology, Beijing, China
Huifeng Shi , State Key Laboratory of Space-Ground Integrated Information Technology (SGIIT), Beijing, China
George A. Constantinides , Imperial College London, London, United Kingdom
Peter Y. K. Cheung , Imperial College London, London, United Kingdom
Wayne Luk , Imperial College London, London, United Kingdom
pp. 1-8

Edge Intelligence: Challenges and Opportunities of Near-Sensor Machine Learning Applications (Abstract)

George Plastiras , KIOS Research and Innovation Center of Excellence
Maria Terzi , KIOS Research and Innovation Center of Excellence
Christos Kyrkou , KIOS Research and Innovation Center of Excellence
Theocharis Theocharidcs , KIOS Research and Innovation Center of Excellence
pp. 1-7

Towards Hardware Accelerated Reinforcement Learning for Application-Specific Robotic Control (Abstract)

Shengjia Shao , Imperial College, London, United Kingdom
Jason Tsai , Imperial College, London, United Kingdom
Michal Mysior , Imperial College, London, United Kingdom
Wayne Luk , Imperial College, London, United Kingdom
Thomas Chau , Imperial College, London, United Kingdom
Alexander Warren , Intel Corporation, United Kingdom
Ben Jeppesen , Intel Corporation, United Kingdom
pp. 1-8

Reconfigurable co-processor architecture with limited numerical precision to accelerate deep convolutional neural networks (Abstract)

Sasindu Wijeratne , Dept. of Electronic and Telecommunication Engineering, University of Moratuwa, Sri Lanka
Sandaruwan Jayaweera , Dept. of Electronic and Telecommunication Engineering, University of Moratuwa, Sri Lanka
Mahesh Dananjaya , Dept. of Electronic and Telecommunication Engineering, University of Moratuwa, Sri Lanka
Ajith Pasqual , Dept. of Electronic and Telecommunication Engineering, University of Moratuwa, Sri Lanka
pp. 1-7

Synthetic Data Approach for Classification and Regression (Abstract)

Yang Yue , School of Software and Microelectronics
Ying Li , National Research Center of Software Engineering
Kexin Yi , National Research Center of Software Engineering
Zhonghai Wu , Academy for Advanced Interdisciplinary, Studies Peking University, Beijing, China
pp. 1-8

A Customized Processing-in-Memory Architecture for Biological Sequence Alignment (Abstract)

Nasrin Akbari , Department of Electrical and Computer Engineering, College of Engineering, University of Tehran, Tehran, Iran
Mehdi Modarressi , Department of Electrical and Computer Engineering, College of Engineering, University of Tehran, Tehran, Iran
Masoud Daneshtalab , Malardalen University (MDH) and Royal institute of Technology (KTH), Sweden
Mohammad Loni , Malardalen University (MDH) and Royal institute of Technology (KTH), Sweden
pp. 1-8

Adaptively Banded Smith-Waterman Algorithm for Long Reads and Its Hardware Accelerator (Abstract)

Yi-Lun Liao , Department of Electrical Engineering, National Taiwan University, Taipei, Taiwan
Yu-Cheng Li , Graduate Institute of Electronics Engineering, National Taiwan University, Taipei, Taiwan
Nae-Chyun Chen , Graduate Institute of Electronics Engineering, National Taiwan University, Taipei, Taiwan
Yi-Chang Lu , Department of Electrical Engineering, National Taiwan University, Taipei, Taiwan
pp. 1-9

FPGA-based PairHMM Forward Algorithm for DNA Variant Calling (Abstract)

Davide Sampietro , Dipartimento di Elettronica, Informazione e Bioingegneria, Politecnico di Milano, Milano, Italy
Chiara Crippa , Dipartimento di Elettronica, Informazione e Bioingegneria, Politecnico di Milano, Milano, Italy
Lorenzo Di Tucci , Dipartimento di Elettronica, Informazione e Bioingegneria, Politecnico di Milano, Milano, Italy
Emanuele Del Sozzo , Dipartimento di Elettronica, Informazione e Bioingegneria, Politecnico di Milano, Milano, Italy
Marco D. Santambrogio , Dipartimento di Elettronica, Informazione e Bioingegneria, Politecnico di Milano, Milano, Italy
pp. 1-8

GPU Acceleration of Advanced k-mer Counting for Computational Genomics (Abstract)

Huiren Li , Department of Electrical and Computer Engineering, University of Illinois, Urbana-Champaign, USA
Anand Ramachandran , Department of Electrical and Computer Engineering, University of Illinois, Urbana-Champaign, USA
Deming Chen , Department of Electrical and Computer Engineering, University of Illinois, Urbana-Champaign, USA
pp. 1-4

A Soft Dual-Processor System with a Partially Run-Time Reconfigurable Shared 128-Bit SIMD Engine (Abstract)

Jose Raul Garcia Ordaz , School of Computer Science, The University of Manchester, United Kingdom
Dirk Koch , School of Computer Science, The University of Manchester, United Kingdom
pp. 1-8

REMAP: Remote mEmory Manager for disAggregated Platforms (Abstract)

Dimitris Theodoropoulos , ICS / FORTH, Greece
Andrea Reale , ICS / FORTH, Greece
Dimitris Syrivelis , IBM Research, Ireland
Maciej Bielski , IBM Research, Ireland
Nikolaos Alachiotis , Virtual Open Systems, France
Dionisios Pnevmatikatos , Virtual Open Systems, France
pp. 1-8

Dynamic Coherent Cluster: A Scalable Sharing Set Management Approach (Abstract)

Julie Dumas , CNRS, Grenoble INP, TIMA, Univ. Grenoble Alpes, Grenoble, 38000, France
Eric Guthmuller , CEA, LETI, Univ. Grenoble Alpes, Grenoble, 38000, France
Frederic Petrot , CNRS, Grenoble INP, TIMA, Univ. Grenoble Alpes, Grenoble, 38000, France
pp. 1-8

Compressive Sensing on Storage Data: An Effective Solution to Alleviate I/0 Bottleneck in Data- Intensive Workloads (Abstract)

Hosein Mohammadi Makrani , Electrical and Computer Engineering Department, George Mason University, Fairfax, USA
Hossein Sayadi , Electrical and Computer Engineering Department, George Mason University, Fairfax, USA
Sai Manoj , Electrical and Computer Engineering Department, George Mason University, Fairfax, USA
Setareh Raftirad , Electrical and Computer Engineering Department, George Mason University, Fairfax, USA
Houman Homayoun , Electrical and Computer Engineering Department, George Mason University, Fairfax, USA
pp. 1-8

Clean the Scratch Registers: A Way to Mitigate Return-Oriented Programming Attacks (Abstract)

Zelin Rong , Zeling Rong is with National, University of Defense Technology, Hunan, China
Peidai Xie , Zeling Rong is with National, University of Defense Technology, Hunan, China
Jingyuan Wang , Zeling Rong is with National, University of Defense Technology, Hunan, China
Shenglin Xu , Zeling Rong is with National, University of Defense Technology, Hunan, China
Yongjun Wang , Zeling Rong is with National, University of Defense Technology, Hunan, China
pp. 1-8

BiSME: A Hardware Coprocessor to Perform Signature Matching at Multi-Gigabit Rates (Abstract)

Subramanian Shiva Shankar , Intel Technology Asia Pte. Ltd., Singapore
Lin PinXing , Intel Technology Asia Pte. Ltd., Singapore
Andreas Herkersdorf , Institute for Integrated Systems, Technische Universität, Munchcn, Germany
Thomas Wild , Institute for Integrated Systems, Technische Universität, Munchcn, Germany
pp. 1-9

Clarifications and Optimizations on Rounding for IEEE-compliant Floating-Point Multiplication (Abstract)

Tuan D. Nguyen , School of Electrical and Computer Engineering, VLSI Computer Architecture Research Group, Oklahoma State University, 202 Engineering South, Stillwater, OK, 74078, USA
Son Bui , School of Electrical and Computer Engineering, VLSI Computer Architecture Research Group, Oklahoma State University, 202 Engineering South, Stillwater, OK, 74078, USA
James E. Stine , School of Electrical and Computer Engineering, VLSI Computer Architecture Research Group, Oklahoma State University, 202 Engineering South, Stillwater, OK, 74078, USA
pp. 1-8

Meta-implementation of vectorized logarithm function in binary floating-point arithmetic (Abstract)

Hugues de Lassus Saint-Genies , Univ, Perpignan Via Domitia, DALI, Perpignan, France
Nicolas Brunie , Kalray, Montbonnot-Saint-Martin, France
Guillaume Revy , Univ, Perpignan Via Domitia, DALI, Perpignan, France
pp. 1-8

A Highly Accurate Energy Model for Task Execution on Heterogeneous Compute Nodes (Abstract)

Achim Losch , Paderborn University, Germany
Marco Platzner , Paderborn University, Germany
pp. 1-8

Fast Energy Estimation Through Partial Execution of HPC Applications (Abstract)

Juan Carlos Salinas-Hilburg , Dept. of Computer Architecture and Automation, Complutense University of Madrid, Madrid, Spain
Marina Zapater , Dept. of Computer Architecture and Automation, Complutense University of Madrid, Madrid, Spain
Jose M. Moya , Integrated Systems Laboratory, Technical University of Madrid, Madrid, Spain
Jose L. Ayala , Dept. of Computer Architecture and Automation, Complutense University of Madrid, Madrid, Spain
pp. 1-8

Invasive Computing for Predictability of Multiple Non-functional Properties: A Cyber-Physical System Case Study (Abstract)

Ericles Sousa , Friedrich-Alexander-Universität Erlangen-Nürnberg (FAU), Germany
Michael Witterauf , Friedrich-Alexander-Universität Erlangen-Nürnberg (FAU), Germany
Marcel Brand , Friedrich-Alexander-Universität Erlangen-Nürnberg (FAU), Germany
Alexandru Tanase , Friedrich-Alexander-Universität Erlangen-Nürnberg (FAU), Germany
Frank Hannig , Friedrich-Alexander-Universität Erlangen-Nürnberg (FAU), Germany
Jurgen Teich , Friedrich-Alexander-Universität Erlangen-Nürnberg (FAU), Germany
pp. 1-9
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