CSDL - 1983 IEEE 6th Symposium on Computer Arithmetic (ARITH) - Table of Contents

Computer Arithmetic, IEEE Symposium on (1983)

Aarhus, Denmark Denmark

June 20, 1983 to June 22, 1983

ISBN: 0-8186-0034-9

TABLE OF CONTENTS

History of previous IEEE meetings dedicated to Computer Arithmetic (PDF)

pp. vii

The design of two easily-testable VLSI array multipliers (PDF)

Joel Ferguson , Department of Electrical Engineering, Carnegie-Mellon University, Schenley Park, Pittsburgh PA 15213 U.S.A.

John Paul Shen , Department of Electrical Engineering, Carnegie-Mellon University, Schenley Park, Pittsburgh PA 15213 U.S.A.

pp. 2-9

A comparison of ALU structures for VLSI technology (PDF)

S. Ong , IBM Thomas J. Watson Research Center, P.O. Box 218, Yorktown Heights, New York 10598, USA

D. E. Atkins , Computer Research Laboratory, Department of Electrical and Computer Engineering, The University of Michigan, Ann Arbor, 48109, USA

pp. 10-16

On design and performance of VLSI based parallel multiplier (PDF)

Dharma P. Agrawal , Department of Electrical and Computer Engineering, North Carolina State University, Raleigh, 27650, USA

Girish C. Pathak , Department of Electrical and Computer Engineering, North Carolina State University, Raleigh, 27650, USA

Nikunja K. Swain , Department of Electrical and Computer Engineering, North Carolina State University, Raleigh, 27650, USA

Bhuwan K. Agrawal , Department of Electrical and Computer Engineering, North Carolina State University, Raleigh, 27650, USA

pp. 17-21

On fast binary addition in MDS Technologies (PDF)

L. Guibas , Xerox Pare, Palo Alto, USA

J. Vuillemin , INRIA, France

pp. 22

Sign detection in Non-Redundant Residue Number System with reduced information (PDF)

Saroj Kaushik , Centre for Computer Science and Engineering, Indian Institute of Technology, Delhi-110016, India

pp. 24-28

Representation and processing of fractions in a residue system (PDF)

Dilip K. Banerji , School of Computer & Systems Sciences, JNU, N. Delhi-110067, USA

Saroj Kaushik , Centre for Computer Science & Engineering, IIT, N. Delhi-110016, USA

pp. 29-36

Systems of numeration (PDF)

Aviezri S. Fraenkel , Department of Applied Mathematics, Weizmann Institute of Science, Rehovot 76100, Israel

pp. 37-42

A multiplier with multiple error correction capability (PDF)

Marco Annaratone , Computer Science Department, Carnegie-Mellon University, Pittsburgh, PA 15213, USA

Renato Stefanelli , Dipartimentodi Elettronica Politecnicodi Milano, Italy

pp. 44-51

Some schemes for fast serial input multipliers (PDF)

Luigi Dadda , Dipartimento di Elettronica, Politecnico di Milano, Italy

pp. 52-59

Fast iterative multiplying array (PDF)

L. Ciminiera , CENS - Dip. di Automatica e Informatica - Politecnico di Torino Corso Duca degli Abruzzi, 24 - 10129 - Italy

A. Serra , CENS - Dip. di Automatica e Informatica - Politecnico di Torino Corso Duca degli Abruzzi, 24 - 10129 - Italy

pp. 60-66

Conditions for the distributivity of multiplication with respect to set addition and their effect on the design of array multipliers (PDF)

James E. Robertson , Department of Computer Science, University of Illinois at Urbana-Champaign, 61801-2987, USA

pp. 67-71

Experience with a high level language that supports interval arithmetic (PDF)

R. Morrison , University of St Andrews, North Haugh, Scotland, KY16 9SX

A. J. Cole , University of St Andrews, North Haugh, Scotland, KY16 9SX

P. J. Bailey , University of St Andrews, North Haugh, Scotland, KY16 9SX

M. A. Wolfe , University of St Andrews, North Haugh, Scotland, KY16 9SX

M. Shearer , University of St Andrews, North Haugh, Scotland, KY16 9SX

pp. 74-78

ADA floating-point arithmetic as a basis for portable numerical software (PDF)

Peter J L Wallis , School of Mathematics, University of Bath Claverton Down, Bath, U.K.

pp. 79-81

On the numerical algorithms formulated in computer arithmetic (PDF)

Svetoslav Markov , Mathematical Institute of the Bulgarian Academy of Sciences, Sofia / BULGARIA

pp. 82-85

A numeric error algebra (PDF)

W.S. Brown , Bell Laboratories Murray Hill, New Jersey 07974, USA

C.S. Wetherell , Bell Laboratories Murray Hill, New Jersey 07974, USA

pp. 86-91

A higher-radix division with simple selection of quotient digits (PDF)

Milos D. Ercegovac , UCLA Computer Science Department, University of California, Los Angeles, USA

pp. 94-98

Square-root algorithms for high-speed digital circuits (PDF)

S. Majerski , Instytut Maszyn Matematycznych Warszawa, POLAND

pp. 99-102

Some tricks of the (floating point) trade (PDF)

J.B. Gosling , The University, Manchester, England

pp. 103

On bit sequential multipliers (PDF)

Ravindra V. Donthi , Department of Electrical & Computer Engineering, Wayne State University, Detroit, U.S.A.

Mohammed Saleem , Department of Electrical & Computer Engineering, Wayne State University, Detroit, U.S.A.

Harpreet Singh , Department of Electrical & Computer Engineering, Wayne State University, Detroit, U.S.A.

pp. 104-108

Arithmetic on the ELXSI System 6400 (PDF)

George S. Taylor , ELXSI, San Jose CA 95131, USA

pp. 110-115

Matrix multiplication on LUCAS (PDF)

Lennart Ohlsson , Department of Computer Engineering, University of Lund, P.O. Box 725, 220 07, SWEDEN

Bertil Svensson , Department of Computer Engineering, University of Lund, P.O. Box 725, 220 07, SWEDEN

pp. 116-122

Multi-operand associative arithmetic (PDF)

Isaac Scherson , The Weizmann Institute of Science, Department of Applied Mathematics, Rehovot, Israel

Smil Ruhman , The Weizmann Institute of Science, Department of Applied Mathematics, Rehovot, Israel

pp. 123-129

An IEEE floating point arithmetic implementation (PDF)

Kari Johnsen , Norwegian Computing Center (NCC), Oslo, Norway

pp. 130-135

Fast matrix solver in GF(2) (PDF)

Yoshiyasu Takefuji , Department of Electrical Engineering, KEIO University, 3-14-1 Hiyoshi, Yokohama 223, JAPAN

Takakazu Kurokawa , Department of Electrical Engineering, KEIO University, 3-14-1 Hiyoshi, Yokohama 223, JAPAN

Hideo Aiso , Department of Electrical Engineering, KEIO University, 3-14-1 Hiyoshi, Yokohama 223, JAPAN

pp. 138-143

Vector reduction methods for arithmetic pipelines (PDF)

Lionel M. Ni , Department of Computer Science, Michigan State University, East Lansing, 48824, USA

Kai Hwang , School of Electrical Engineering, Purdue University, West Lafayette, IN 47907, USA

pp. 144-150

On-line multiplicative normalization (PDF)

A.L. Grnarov , Electrical Engineering Department, University of Skopje, Yugoslavia

M.D. Ercegovac , UCLA Computer Science Department, University of California, Los Angeles, USA

pp. 151-155

Numerical limitations on the design of digit online networks (PDF)

Robert Michael Owens , Department of Computer Science, The Pennsylvania State University, University Park, PA 16802 USA

Mary Jane Irwin , Department of Computer Science, The Pennsylvania State University, University Park, PA 16802 USA

pp. 156-161

Arithmetic for a high-speed adaptive learning network element (PDF)

Hideaki Kobayashi , Department of Electrical and Computer Engineering, University of South Carolina, Columbia, 29208, USA

Ronald D. Bonnell , Department of Electrical and Computer Engineering, University of South Carolina, Columbia, 29208, USA

pp. 164-168

Applications for arithmetic error codes in large, high-performance computers (PDF)

Algirdas Avizienis , UCLA Computer Science Department, University of California, Los Angeles, 90024 USA

C. S. Raghavendra , Electrical Engineering-Systems Department, University of Southern California, Los Angeles, 90089 USA

pp. 169-173

Models for VLSI implementation of residue number system arithmetic modules (PDF)

M.A. Bayoumi , Department of Electrical Engineering, University of Windsor, Ontario, N9B 3P4, Canada

G.A. Jullien , Department of Electrical Engineering, University of Windsor, Ontario, N9B 3P4, Canada

W.C. Miller , Department of Electrical Engineering, University of Windsor, Ontario, N9B 3P4, Canada

pp. 174-182

Continued fractions for high-speed and high-accuracy computer arithmetic (PDF)

Robert B. Seidensticker , Aydin Computer Systems, Ft. Washington, PA 19034 USA

pp. 184-193

Floating-point recurring rational arithmetic system (PDF)

Kaoru Yoshida , Department of Electrical Engineering, Keio University, 3-14-1 Hiyoshi, Yokohama 223 Japan

pp. 194-200

An order preserving finite binary encoding of the rationals (PDF)

David W. Matula , Southern Methodist University, USA

Peter Kornerup , Aarhus University, Denmark

pp. 201-209

A unified view of approximate rational arithmetic and rational interpolation (PDF)

A. Miola , Istituto di Analisi dei Sistemi ed Informatica del CNR, Via Buonarroti 12, 00185 Roma, Italy

pp. 210-220