Abstract
A standard-cell library for MOSIS scaleable CMOS rules has been developed. It is intended for use with Synopsys Design Compiler, Cadence Silicon Ensemble, and Cadence Virtuoso or Magic. The library is targeted for the AMI 0.5?m process, which currently offers the smallest feature size in the MOSIS educational program. The library also includes I/O pad cells and fully places and routes a padframe if desired. All steps in the design flow are fully automated with only three scripts and have been tested successfully in a large VLSI design class at the Illinois Institute of Technology. To customize and run these three scripts, for a given design, typically takes less than five minutes, since all details are transparent to the students, allowing them to focus on the design instead of worrying about the tools.