Embedded Deterministic Test for Low-Cost Manufacturing Test

Januz Rajki; Jerzy Tyzer; Mark Kassab; Nilanjan Mukherjee; Rob Thompson; Kun-Han Tsai; Andre Hertwig; Nagesh Tamarapalli; Grzegorz Mrugalski; Geir Eide; Jun Qian

doi:10.1109/TEST.2002.1041773

Proceedings. International Test Conference

Embedded Deterministic Test for Low-Cost Manufacturing Test

Year: 2002, Pages: 301

DOI Bookmark: 10.1109/TEST.2002.1041773

Authors

Januz Rajki, Mentor Graphics Corporation
Jerzy Tyzer, Poznan University of Technology
Mark Kassab, Mentor Graphics Corporation
Nilanjan Mukherjee, Mentor Graphics Corporation
Rob Thompson, Mentor Graphics Corporation
Kun-Han Tsai, Mentor Graphics Corporation
Andre Hertwig, Mentor Graphics Corporation
Nagesh Tamarapalli, Mentor Graphics Corporation
Grzegorz Mrugalski, Poznan University of Technology
Geir Eide, Mentor Graphics Corporation
Jun Qian, Cisco Systems

Abstract

This paper introduces Embedded Deterministic Test (EDT) technology, which reduces manufacturing test cost by providing one to two orders of magnitude reduction in scan test data volume and scan test time. The EDT architecture, the compression algorithm, design flow, experimental results, and silicon implementation are presented.

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Embedded Deterministic Test for Low-Cost Manufacturing Test

Authors

Abstract

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