http://www.computer.org/concurrency en-us Wed, 4 Jan 2012 11:00:01 GMT http://csdl.computer.org/common/images/logos/concurrency.gif List of recently published journal articles http://www.computer.org/concurrency http://doi.ieeecomputersociety.org/10.1109/MCC.2000.10018 http://doi.ieeecomputersociety.org/10.1109/MCC.2000.10018 http://doi.ieeecomputersociety.org/10.1109/4434.895087 http://doi.ieeecomputersociety.org/10.1109/4434.895087 http://doi.ieeecomputersociety.org/10.1109/4434.895097 http://doi.ieeecomputersociety.org/10.1109/4434.895097 http://doi.ieeecomputersociety.org/10.1109/4434.895100 Analysis of future parallel computers requires rapidly simulating target designs running realistic workloads. Two techniques have accelerated such simulations: direct execution and using a parallel host. Historically, these techniques have lacked portability. The authors identify four key operations necessary to make these simulations portable. This lets them run the Wisconsin Wind Tunnel II readily on a wide range of Sparc platforms from a workstation cluster to a symmetric multiprocessor. WWT II has good performance and scalability, as shown on a range of benchmarks. It achieves speedups between 8.6 and 13.6 on a 16-host-processor SMP. Finally, the authors show that parallel simulation with WWT II is cost effective. http://doi.ieeecomputersociety.org/10.1109/4434.895100 http://doi.ieeecomputersociety.org/10.1109/4434.895101 Existing parallel machines provide tremendous potential for high performance, but their programming can be a cumbersome and error-prone process. Software tools providing automatic functionalities free programmers from the nuisance of manual labor and can ensure better performance through code restructuring and optimization. This article describes an experimental software tool called CASCH (Computer Aided SCHeduling) for parallelizing and scheduling applications on message-passing multiprocessors. CASCH transforms a sequential program to a parallel program with automatic scheduling, mapping, communication, and synchronization. Its major strength is its extensive library of scheduling and mapping algorithms representing a broad range of state-of-the-art work reported in the recent literature. These algorithms can be interactively analyzed, tested, and compared using real data on a common platform with various performance objectives, enabling the programmer to select the most suitable algorithm for the application. CASCH, with its graphical interface, can be auspicious for both naive and expert programmers of parallel machines, and can also serve as a teaching and learning aid for understanding scheduling and mapping algorithms. http://doi.ieeecomputersociety.org/10.1109/4434.895101 http://doi.ieeecomputersociety.org/10.1109/4434.895104 Commit protocols have been proposed for use in a variety of concurrent-computing applications. The author has developed two condition sets that can help you determine when to use a commit protocol and when to avoid them. http://doi.ieeecomputersociety.org/10.1109/4434.895104 http://doi.ieeecomputersociety.org/10.1109/4434.895105 Relative debugging is a powerful paradigm that makes it possible to locate errors in programs that occur as a result of porting or rewriting the code. Developed initially in 1994, the technique has been used widely in a range of case studies. However, until recently, relative debugging has only been applied to programs that have been written in the same language, or in languages with very similar semantics, such as C and Fortran. In addition, case studies to date have only examined sequential codes, or single process parallel codes. In this article, we describe the architecture of a parallel relative debugger and present the first experiences of using relative debugging to compare a program written in a sequential language with one that has been ported to the data parallel language ZPL. We show how this implementation has been used to find errors that have not previously been located in the program, and more importantly, that the technique can be used by programmers with little knowledge of the language or the underlying application. http://doi.ieeecomputersociety.org/10.1109/4434.895105 http://doi.ieeecomputersociety.org/10.1109/MCC.2000.895106 http://doi.ieeecomputersociety.org/10.1109/MCC.2000.895106 http://doi.ieeecomputersociety.org/10.1109/4434.895107 This article describes the Java Microcontrolled Device (JMD), an embedded system equipped with a microcontroller unit suitably designed for distributed process control applications. It embeds a CPU with a small amount of memory, several digital and analog I/O lines and a serial interface for the interconnection with other process control devices. The JMD is equipped with an operating system, the JMD-OS, which allows the execution of process control applications written in Java. In this is a two-layer operating system, the upper layer, called the JMD kernel, is entirely written in Java and provides the application with several services designed so that they are independent of the underlying hardware. It also provides the execution environment for the process control applications and, in particular, for time-critical ones which, differently from traditional computer systems applications, are modeled by means of a set of tasks to be executed periodically and by a given deadline. The lower layer is composed of a microkernel that provides a set of hardware-dependent system calls for accessing the external I/O lines. The design of the architecture, based on the microkernel model, can isolate the OS from the hardware level, thus making both the JMD Kernel and JMD applications independent of the platform they run on. http://doi.ieeecomputersociety.org/10.1109/4434.895107 http://doi.ieeecomputersociety.org/10.1109/4434.895108 Caliper is an architecture for software developer tools that deal with executable (binary) programs. It provides a common framework that allows for building a wide variety of tools for performance analysis, profiling, coverage analysis, correctness checking, and testing. It uses a technology known as dynamic instrumentation, which lets program instructions be changed on-the-fly with instrumentation probes. Dynamic instrumentation makes Caliper easy to use: It requires no special preparation of an application, supports shared libraries, collects data for multiple threads, and has low intrusion and overhead. This article describes Caliper for HP-UX, running on the IA-64 (Itanium) processor. http://doi.ieeecomputersociety.org/10.1109/4434.895108 http://doi.ieeecomputersociety.org/10.1109/4434.895109 The C++ programming language offers a feature known as exception handling, which is used, for instance, to report error conditions. This technique can result in more robust software. On the other hand, it generally has a highly negative performance impact, even when exceptions are not actually thrown. This impact is especially important on an architecture such as the HP/Intel IA-64 processor, which is very sensitive to compiler optimizations. Hewlett-Packard implemented exception handling for IA-64 in a way that leaves the door open for optimizations, even in the presence of exceptions. http://doi.ieeecomputersociety.org/10.1109/4434.895109 http://doi.ieeecomputersociety.org/10.1109/MCC.2000.10017 http://doi.ieeecomputersociety.org/10.1109/MCC.2000.10017 http://doi.ieeecomputersociety.org/10.1109/MCC.2000.895111 http://doi.ieeecomputersociety.org/10.1109/MCC.2000.895111 http://doi.ieeecomputersociety.org/10.1109/MCC.2000.10019 http://doi.ieeecomputersociety.org/10.1109/MCC.2000.10019