Abstract
This paper deals with testing of inter-port faults in multi-port Static Random Access Memories (SRAMs). A inter-port fault is caused by a short between word/bit lines of different ports in a multi-port SRAM. By considering different implementations of the SRAM and its layout, an approach, which achieves 100 % coverage of fault detection, is proposed.This two-step approach is based on two novel algorithms, MMCA (Modified March C Algorithm) and WIPD (Write Inter-Port Detection). It is shown that inter-port fault detection is a combinatorial problem; hence, MMCA and WIPD must be executed multiple times depending on the types, number of ports and line arrangement in the layout.