Abstract
Abstract: The order of faults which are targeted for test-pattern generation affects both the processing time for test generation and the number of test-patterns. This order is referred to as a test generation schedule. In this paper, we consider the test generation scheduling problem which minimizes the cost of testing. We analyze the effect of scheduling based on test-pattern generation time and dominating probability. Then, we present experimental results on the ISCAS'85 benchmark circuits.