|
Published Articles >> Table of Contents >> Abstract
16th Symposium on Computer Architecture and High Performance Computing (SBAC-PAD'04)
pp. 66-73
ArchC: A SystemC-Based Architecture Description Language
Sandro Rigo, University of Campinas, Brazil
Guido Araujo, University of Campinas, Brazil
Marcus Bartholomeu, University of Campinas, Brazil
Rodolfo Azevedo, University of Campinas, Brazil
Full Article Text:
 
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/CAHPC.2004.8
Send link to a friend
| Abstract |
|
This paper presents an architecture description language (ADL) called ArchC, which is an open-source SystemC-based language that is specialized for processor architecture description. Its main goal is to provide enough information, at the right level of abstraction, in order to allow users to explore and verify new architectures, by automatically generating software tools like simulators and co-verification interfaces. ArchC's key features are a storage-based co-verification mechanism that automatically checks the consistency of a refined ArchC model against a reference (functional) description, memory hierarchy modeling capability, the possibility of integration with other SystemC IPs and the automatic generation of high-level SystemC simulators. We have used ArchC to synthesize both functional and cycle-based simulators for the MIPS, Intel 8051 and SPARC V8 processors, as well as functional models of modern architectures like TMS320C62x, XScale and PowerPC.
|
 Additional Information
|
Citation:
Sandro Rigo, Guido Araujo, Marcus Bartholomeu, Rodolfo Azevedo,
"ArchC: A SystemC-Based Architecture Description Language,"
sbac-pad,
pp. 66-73,
16th Symposium on Computer Architecture and High Performance Computing (SBAC-PAD'04),
2004
|
|
