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Fourth International Workshop on Real-Time Computing Systems and Applications (RTCSA'97)   p. 206
Real-time scheduling in a programmable radar signal processor
Cheng Chang, Chung Shan Inst. of Sci. & Technol., Lung-Tan, Taiwan
Chien-Chung Chen, Chung Shan Inst. of Sci. & Technol., Lung-Tan, Taiwan
Yao-Liang Chen, Chung Shan Inst. of Sci. & Technol., Lung-Tan, Taiwan
Fu-Shin Huang, Chung Shan Inst. of Sci. & Technol., Lung-Tan, Taiwan

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DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/RTCSA.1997.629225
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Abstract
The new trend of designing radar digital signal processors is not only to improve their processing speed by adopting the parallel multi-processor architecture but also to make their infrastructure flexible so that one generic digital signal processor framework can be applied to a variety of different radar systems. The key technology to make such radar digital signal processor architecture programmable, or flexible, is the scheduler which manages resources of digital signal processing in real-time according to system requirements. In this paper, the architecture of the programmable radar signal processor (PRSP) is presented, and a real-time scheduling algorithm used in PRSP is thoroughly discussed.
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Index Terms- radar signal processing; real-time scheduling; programmable radar signal processor; processing speed; parallel multi-processor architecture; digital signal processing; real-time scheduling algorithm Citation:  Cheng Chang, Chien-Chung Chen, Yao-Liang Chen, Fu-Shin Huang, "Real-time scheduling in a programmable radar signal processor," rtcsa, p. 206,  Fourth International Workshop on Real-Time Computing Systems and Applications (RTCSA'97),  1997