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Published Articles >> Table of Contents >> Abstract
Fourth International Workshop on Real-Time Computing Systems and Applications (RTCSA'97)
p. 51
On memory protection in real-time OS for small embedded systems
S. Suzuki, Res. Lab., Hitachi Ltd., Ibaraki, Japan
K.G. Shin, Res. Lab., Hitachi Ltd., Ibaraki, Japan
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DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/RTCSA.1997.629173
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| Abstract |
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Memory protection is an important OS feature for the reliability and safety of real-time control systems. In this paper, we study the feasibility of memory protection in small embedded systems in which memory size ranges from several tens of KBytes to several hundreds of KBytes. We evaluate various protection methods in terms of memory consumption, processing overhead, multiple-thread support, region enlargement, and hardware support. We present a new protection method called intermediate-level skip multi-size paging which skips unused intermediate-level page tables of multi-level paging and supports several page sizes. Our evaluation results show that this method along with paged segmentation and short-circuit segment tree are more cost-effective than other known memory protection methods. Also, the feasibility of intermediate-level skip multi-size paging can be improved if a MMU supporting several page sizes is available for microprocessors.
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 Additional Information
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Index Terms- real-time systems; memory protection; real-time OS; small embedded systems; reliability; safety; region enlargement; hardware support; memory consumption; processing overhead; intermediate-level skip multi-size paging; multi-level paging; paged segmentation; short-circuit segment tree; microprocessors
Citation:
S. Suzuki, K.G. Shin,
"On memory protection in real-time OS for small embedded systems,"
rtcsa,
p. 51,
Fourth International Workshop on Real-Time Computing Systems and Applications (RTCSA'97),
1997
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