Published Articles >> Table of Contents >> Abstract

13th IEEE International Workshop on Rapid System Prototyping (RSP'02)   p. 42
Prototyping of a High Performance Generic Viterbi Decoder
Abdulfattah Mohammad Obeid, Darmstadt University of Technology
Alberto Garcia Ortiz, Darmstadt University of Technology
Ralf Ludewig, Darmstadt University of Technology
Manfred Glesner, Darmstadt University of Technology

Full Article Text:

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/IWRSP.2002.1029736
Send link to a friend

Abstract
For its proven efficiency, the Viterbi algorithm is widely used for decoding convolutionally encoded messages. In this work, a high performance generic soft input hard output Viterbi decoder is presented and prototyped on an FPGA board. The presented Viterbi decoder is intended to be used in a complete wireless LAN transceiver prototype. The genericity of the design facilitates not only the prototyping of Viterbi decoders with different specifications, but moreover, it facilitates the exploration the performance of different implementations in order to obtain the most suitable solution for a particular communication system.
Back to Top Additional Information
Citation:  Abdulfattah Mohammad Obeid, Alberto Garcia Ortiz, Ralf Ludewig, Manfred Glesner, "Prototyping of a High Performance Generic Viterbi Decoder," rsp, p. 42,  13th IEEE International Workshop on Rapid System Prototyping (RSP'02),  2002