Rapid System Prototyping, IEEE International Workshop on
Download PDF

Abstract

Abstract: The paper considers reconfigurable computing for application-specific systems, with particular reference to mixed-technology chips. A VLIW "core" is augmented by means of Reconfigurable Functional Units (RFUs) and register files implemented via FPGA onto the same chip. The application is analyzed to extract segments of computation that could be usefully collapsed into complex instructions decoded and executed by the RFUs. Here, we focus on the problem of selecting the optimum extension to the native Instruction Set by means of the "best" segments of computation that will become complex instruction. In particular a genetic algorithm approach is introduced to analyze the population of candidates; modifications to the classic genetic operators are introduced to take into account the peculiarity of our problem. Applying the proposed methodology to some significant applications has validated the overall approach
Like what you’re reading?
Already a member?
Get this article FREE with a new membership!