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Proceedings.International Conference on Parallel Architectures and Compilation Techniques

Sept. 25 2002 to Sept. 25 2002

Charlottesville, VA, USA

Table of Contents

Introduction
Message from the General ChairsFreely available from IEEE.pp. ix
Introduction
Message from the Program ChairsFreely available from IEEE.pp. xi
Introduction
Organizing CommitteeFreely available from IEEE.pp. xiii
Introduction
Steering CommitteeFreely available from IEEE.pp. xiv
Introduction
Program CommitteeFreely available from IEEE.pp. xv
Introduction
ReviewersFreely available from IEEE.pp. xvi
Keynote Address
Parallelism in Mainstream Enterprise Platforms of the FutureFull-text access may be available. Sign in or learn about subscription options.pp. 3
Session 1: Data Parallelism and Threading
An Evaluation of Data-Parallel Compiler Support for Line-Sweep ApplicationsFull-text access may be available. Sign in or learn about subscription options.pp. 7
Session 1: Data Parallelism and Threading
Increasing and Detecting Memory Address CongruenceFull-text access may be available. Sign in or learn about subscription options.pp. 18
Session 1: Data Parallelism and Threading
Transparent Threads: Resource Sharing in SMT Processors for High Single-Thread PerformanceFull-text access may be available. Sign in or learn about subscription options.pp. 30
Session 2: Compiler Support for Architecture
Compiler-Controlled Caching in Superword Register Files for Multimedia Extension ArchitecturesFull-text access may be available. Sign in or learn about subscription options.pp. 45
Session 2: Compiler Support for Architecture
Effective Compilation Support for Variable Instruction Set ArchitectureFull-text access may be available. Sign in or learn about subscription options.pp. 56
Session 2: Compiler Support for Architecture
A Framework for Parallelizing Load/Stores on Embedded ProcessorsFull-text access may be available. Sign in or learn about subscription options.pp. 68
Session 3: Program Characterization
Workload Design: Selecting Representative Program-Input PairsFull-text access may be available. Sign in or learn about subscription options.pp. 83
Session 3: Program Characterization
Dataflow Frequency Analysis Based on Whole Program PathsFull-text access may be available. Sign in or learn about subscription options.pp. 95
Session 3: Program Characterization
Quantifying Instruction CriticalityFull-text access may be available. Sign in or learn about subscription options.pp. 104
Keynote Address
The Role of Computational Science in Energy Efficiency and Renewable EnergyFull-text access may be available. Sign in or learn about subscription options.pp. 117
Session 4: Power
Application Transformations for Energy and Performance-Aware Device ManagementFull-text access may be available. Sign in or learn about subscription options.pp. 121
Session 4: Power
Leakage Energy Management in Cache HierarchiesFull-text access may be available. Sign in or learn about subscription options.pp. 131
Session 5: Prediction
The Use of Prediction for Accelerating Upgrade Misses in cc-NUMA MultiprocessorsFull-text access may be available. Sign in or learn about subscription options.pp. 155
Session 5: Prediction
Predicting Conditional Branches With Fusion-Based Hybrid PredictorsFull-text access may be available. Sign in or learn about subscription options.pp. 165
Session 6: Memory Performance
Speculative Sequential Consistency with Little Custom StorageFull-text access may be available. Sign in or learn about subscription options.pp. 179
Session 6: Memory Performance
Cost-Effective Compiler Directed Memory Prefetching and BypassingFull-text access may be available. Sign in or learn about subscription options.pp. 189
Session 6: Memory Performance
Using the Compiler to Improve Cache Replacement DecisionsFull-text access may be available. Sign in or learn about subscription options.pp. 199
Session 7: Memory Aliasing
Software Bubbles: Using Predication to Compensate for Aliasing in Software PipelinesFull-text access may be available. Sign in or learn about subscription options.pp. 211
Session 7: Memory Aliasing
Speculative Alias Analysis for Executable CodeFull-text access may be available. Sign in or learn about subscription options.pp. 222
Session 7: Memory Aliasing
Cost Effective Memory Dependence Prediction using Speculation Levels and Color SetsFull-text access may be available. Sign in or learn about subscription options.pp. 232
Keynote Address
The Computational Grid: Aggregating Performance and Enhanced Capability from Federated ResourcesFull-text access may be available. Sign in or learn about subscription options.pp. 245
Session 8: Java and IA-64
Just-In-Time Java™ Compilation for the Itanium® ProcessorFull-text access may be available. Sign in or learn about subscription options.pp. 249
Session 8: Java and IA-64
Eliminating Exception Constraints of Java Programs for IA-64Full-text access may be available. Sign in or learn about subscription options.pp. 259
Session 9: Clustered Microarchitectures
Optimizing Loop Performance for Clustered VLIW ArchitecturesFull-text access may be available. Sign in or learn about subscription options.pp. 271
Session 9: Clustered Microarchitectures
Exploiting Pseudo-Schedules to Guide Data Dependence Graph PartitioningFull-text access may be available. Sign in or learn about subscription options.pp. 281
Session 9: Clustered Microarchitectures
Efficient Interconnects for Clustered MicroarchitecturesFull-text access may be available. Sign in or learn about subscription options.pp. 291
SIGARCH Conference Guidelines
SIGARCH Conference GuidelinesFull-text access may be available. Sign in or learn about subscription options.pp. 301
Author Index
Author IndexFreely available from IEEE.pp. 305
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