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Published Articles >> Table of Contents >> Abstract
First ACM and IEEE International Conference on Formal Methods and Models for Co-Design (MEMOCODE03)
p. 123
From Algorithm and Architecture Specifications to Automatic Generation of Distributed Real-Time Executives: a Seamless Flow of Graphs Transformations
Thierry Grandpierre, ESIEE Paris, Cite Descarte BP99
Yves Sorel, INRIA, Domaine de Voluceau BP 105
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DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/MEMCOD.2003.1210097
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| Abstract |
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This paper presents a seamless flow of transformations
which performs dedicated distributed executive generation
from a high level specification of a pair: algorithm,
architecture. This work is based upon graph models and
graph transformations and is part of the AAA methodology.
We present an original architecture model which allows
to perform accurate sequencer modeling, memory allocation,
and heterogeneous inter-processor communications for both
modes shared memory and message passing. Then we present
the flow of transformations that leads to the automatic generation
of dedicated real-time distributed executives which are deadlock
free. This transformation flow has been implemented in a system
level CAD software tool called SynDEx.
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Additional Information
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Citation:
Thierry Grandpierre, Yves Sorel,
"From Algorithm and Architecture Specifications to Automatic Generation of Distributed Real-Time Executives: a Seamless Flow of Graphs Transformations,"
memocode,
p. 123,
First ACM and IEEE International Conference on Formal Methods and Models for Co-Design (MEMOCODE03),
2003
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