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IEEE Computer Society Annual Symposium on VLSI Emerging Trends in VLSI Systems Design (ISVLSI'04)   p. 289
Concurrent Pseudo-Exhaustive Testing of Combinational VLSI Circuits

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DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ISVLSI.2004.1339560
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Abstract
Partitioning and concurrent pseudo-exhaustive test scheme has been proposed as a powerful solution to very large scale integrated (VLSI) testing problem. Pseudo-exhaustive test methodology provides effective, 100% fault coverage for all testable stuck-at faults. After partitioning the ISCAS’85 benchmark circuits, results were processed and studied to develop a procedure for concurrent testing. Tools written in C/C++ to process benchmark circuits and to produce sets of primary outputs and partitioned points that can be tested concurrently were developed.
Additional Information

Citation:  B. Shaer, "Concurrent Pseudo-Exhaustive Testing of Combinational VLSI Circuits," isvlsi, p. 289,  IEEE Computer Society Annual Symposium on VLSI Emerging Trends in VLSI Systems Design (ISVLSI'04),  2004

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