An Efficient Calibration Technique for Systematic Current-Mismatch of D/A Converters

IEEE Computer Society Annual Symposium on VLSI (ISVLSI'03) p. 80
An Efficient Calibration Technique for Systematic Current-Mismatch of D/A Converters
Kwang-Hyun Baek, Rockwell Scientific Company
Myung-Jun Choe, Rockwell Scientific Company
Sung-Mo (Steve) Kang, University of California

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DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ISVLSI.2003.1183356
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Abstract
This paper presents a current calibration technique for systematic mismatch in current-cell array.The proposed technique is suitable for GHz-range current-steering D/A converters because of an efficient and its totally independent calibration operation. Behavioral simulation and measurement results show that static and yield performance of a D/A converter can be enhanced significantly by using the proposed technique.A measured reduction in INL and DNL errors before and after calibration is from +33.2 /-60.1 LSB to +1.28 /-1.28 LSB and from +10.2 /-12.8 LSBto +2.56 / -1.28 LSBin 12-bit resolution.
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Citation: Kwang-Hyun Baek, Myung-Jun Choe, Sung-Mo (Steve) Kang, "An Efficient Calibration Technique for Systematic Current-Mismatch of D/A Converters," isvlsi, p. 80, IEEE Computer Society Annual Symposium on VLSI (ISVLSI'03), 2003

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