| Abstract |
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A resynthesis method to protect firm cores or circuit netlist representations is presented. The design is protected by embedding watermark by rewiring circuit with one or more redundancy addition/removal steps. There is no or negligible area or timing overhead and existing test sets may be preserved. We analyze several attack stategies and we experimentally demonstrate that the proof of authorship is guaranteed with very high probability for ISCAS’85 and ITC’99 benchmarks
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 Additional Information
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Citation:
M. Moiz Khan, Spyros Tragoudas,
"Rewiring for Watermarking Digital Circuits,"
isqed,
pp. 143-148,
5th International Symposium on Quality Electronic Design (ISQED'04),
2004
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