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First International Symposium on Quality of Electronic Design   p. 513
Quick On-Chip Self- and Mutual-Inductance Screen
Shen Lin, Hewlett-Packard Laboratories
Norman Chang, Hewlett-Packard Laboratories
Sam Nakagawa, Hewlett-Packard Laboratories

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DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ISQED.2000.838940
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Abstract
In this paper, based on simulations of top-level interconnects and CMOS devices of industrial 0.18 technology, the rules to screen out those inductive interconnects requiring more accurate RLC considerations, and the victim wires potentially having significant inductive noises are developed. The presented criteria constitute a tighter self-inductance screening rule than those found in previously published work. The 2x mutual-inductance screening rule is presented and verified. The differences in on-chip inductance consideration, the significant frequency of a trapezoidal pulse, and the circuit modeling of on-chip inductance are also discussed.
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Index Terms- inductance screening, significant frequency, signal integrity, inductive coupling, and inductive modeling Citation:  Shen Lin, Norman Chang, Sam Nakagawa, "Quick On-Chip Self- and Mutual-Inductance Screen," isqed, p. 513,  First International Symposium on Quality of Electronic Design,  2000