| Abstract |
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This paper summarizes the experiences gained from the EU project FIT which was aimed at the verification of TTP/C protocol. Several fault injection techniques have been successfully applied during the project, but we will focus mainly on the "high level simulation" approach. The key contribution of the paper is a summary of the lessons learned from our experiences with functional verification of embedded systems, using the discrete-time simulation method.
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Additional Information
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Citation:
Premysl Brada, Petr Grillinger, Stanislav Racek,
"High-Level Simulation of Embedded Systems: Experiences from the FIT Project,"
isorc,
pp. 245-248,
Seventh IEEE International Symposium on Object-Oriented Real-Time Distributed Computing (ISORC'04),
2004
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