Algorithms for Taylor Expansion Diagrams

Goerschwin Fey; Rolf Drechsler; Maciej Ciesielski

doi:10.1109/ISMVL.2004.1319947

Proceedings. 34th International Symposium on Multiple-Valued Logic

Algorithms for Taylor Expansion Diagrams

Year: 2004, Pages: 235-240

DOI Bookmark: 10.1109/ISMVL.2004.1319947

Authors

Goerschwin Fey, University of Bremen
Rolf Drechsler, University of Bremen
Maciej Ciesielski, University of Massachusetts at Amherst

Abstract

The ever increasing size of integrated circuits results in large problem sizes during synthesis and verification of such designs. Recently Taylor Expansion Diagrams (TEDs) were introduced as a data structure to cope with large problem instances. TEDs allow to exploit high level information in the representation of functions. In this paper the basic TED operations are analyzed from a complexity point of view. Suggestions for optimizations of the originally proposed algorithms are made.

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Algorithms for Taylor Expansion Diagrams

Authors

Abstract

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