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Proceedings
IPDPS
IPDPS 2004
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Parallel and Distributed Processing Symposium, International
Apr. 26 2004 to Apr. 30 2004
Santa Fe, New Mexico
ISBN: 0-7695-2132-0
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Table of Contents
Proceedings 18th International Parallel and Distributed Processing Symposium
Freely available from IEEE.
pp. ii-ii
Proceedings 18th International Parallel and Distributed Processing Symposium Copyright Page
Freely available from IEEE.
pp. iii-iii
Proceedings 18th International Parallel and Distributed Processing Symposium
Freely available from IEEE.
pp. iv-iv
Proceedings 18th International Parallel and Distributed Processing Symposium Table of contents
Freely available from IEEE.
pp. v-xxxix
Message from the general vice-chair
Freely available from IEEE.
pp. xliv-xliv
Message from the tutorials chair
Freely available from IEEE.
pp. xlv-xlv
Message from the industrial track chair
Freely available from IEEE.
pp. xlvi-xlvi
IPDPS 2004 organization
Freely available from IEEE.
pp. xlviii-xlix
IPDPS 2004 technical program
Freely available from IEEE.
pp. li-liii
Introduction
Workshop Introduction
Freely available from IEEE.
pp. 131
Papers
Of Gates and Wires
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pp. 132a
by
Patrick Lysaght
,
Delon Levi
Papers
A Parallel Architecture for Secure FPGA Symmetric Encryption
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pp. 132b
by
E. J. Swankoski
,
V. Narayanan
,
M. Kandemir
,
M. J. Irwin
Papers
Tuning Reconfigurable Microarchitectures for Power Efficiency
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pp. 133a
by
Ashutosh S. Dhodapkar
,
James E. Smith
Papers
A Reconfigurable Tag Computation Architecture for Terabit Packet Scheduling
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pp. 133b
by
S. Sezer
,
C. Toal
,
E. Garcia
,
V. Stewart
Papers
A New Approach for On-line Placement on Reconfigurable Devices
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pp. 134a
by
Ali Ahmadinia
,
Christophe Bobda
,
Marcus Bednara
,
Jürgen Teich
Papers
Improving Java Performance Using Dynamic Method Migration on FPGAs
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pp. 134b
by
Emanuele Lattanzi
,
Aman Gayasen
,
Mahmuth Kandemir
,
Vijaykrishnan Narayanan
,
Luca Benini
,
Alessandro Bogliolo
Papers
An FPGA Run-Time System for Dynamical On-Demand Reconfiguration
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pp. 135a
by
Michael Ullmann
,
Michael H?
,
Bj? Grimm
,
J? Becker
Papers
Models and Reconfiguration Problems for Multi Task Hyperreconfigurable Architectures
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pp. 135b
by
Sebastian Lange
,
Martin Middendorf
Papers
Runtime Reconfigurable Interfaces — The RTR-IFB Approach
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pp. 136a
by
Stefan Ihmor
,
Wolfram Hardt
Papers
System-Level Parallelism and Throughput Optimization in Designing Reconfigurable Computing Applications
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pp. 136b
by
Esam El-Araby
,
Mohamed Taher
,
Kris Gaj
,
Tarek El-Ghazawi
,
David Caliga
,
Nikitas Alexandridis
Papers
Embedded Software Integration for Coarse-Grain Reconfigurable Systems
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pp. 137
by
Patrick Schaumont
,
Kazuo Sakiyama
,
Alireza Hodjat
,
Ingrid Verbauwhede
Papers
An Integrated FPGA Design Framework: Custom Designed FPGA Platform and Application Mapping Toolset Development
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pp. 138a
by
V. Kalenteridis
,
H. Pournara
,
K. Siozios
,
K. Tatas
,
G. Koytroympezis
,
I. Pappas
,
S. Nikolaidis
,
S. Siskos
,
D. J. Soudris
,
A. Thanailakis
Papers
Real-Time Configuration Code Decompression for Dynamic FPGA Self-Reconfiguration
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pp. 138b
by
Michael Huebner
,
Michael Ullmann
,
Florian Weissel
,
Juergen Becker
Papers
Forward-Looking Macro Generation and Relational Placement During High Level Synthesis to FPGAs
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pp. 139a
by
Renqiu Huang
,
Ranga Vemuri
Papers
Integrated Modeling and Generation of a Reconfigurable Network-on-Chip
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pp. 139b
by
Doris Ching
,
Patrick Schaumont
,
Ingrid Verbauwhede
Papers
Dynamic Reconfiguration of Distributed Arithmetic Controllers: Design Space Exploration and Trade-Off Analysis
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pp. 140a
by
Klaus Danne
,
Christophe Bobda
Papers
Hardware Assisted Two Dimensional Ultra Fast Placement
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pp. 140b
by
Manish Handa
,
Ranga Vemuri
Papers
System-on-Programmable-Chip Approach Enabling Online Fine-Grained 1D-Placement
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pp. 141a
by
H. Kalte
,
M. Porrmann
,
U. R?ckert
Papers
Non-Contiguous Linear Placement for Reconfigurable Fabrics
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pp. 141b
by
Cristinel Ababei
,
Kia Bazargan
Papers
Impacting Education Using FPGAs
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pp. 142a
by
Don Bouldin
Papers
Developing Large-Scale Field-Programmable Analog Arrays
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pp. 142b
by
Tyson S. Hall
,
Christopher M. Twigg
,
Paul Hasler
,
David V. Anderson
Papers
Dynamically Reconfigurable Neuron Architecture for the Implementation of Self-Organizing Learning Array
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pp. 143a
by
Janusz A. Starzyk
,
Yongtao Guo
,
Zhineng Zhu
Papers
Designing a Runtime Reconfigurable Processor for General Purpose Applications
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pp. 143b
by
Adronis Niyonkuru
,
Hans Christoph Zeidler
Papers
A Parallel Architecture for Fast Computation of Elliptic Curve Scalar Multiplication over GF(2^m)
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pp. 144a
by
Nazar A. Saqib
,
Francisco Rodríguez-Henriquez
,
Arturo Díaz-Pérez
Papers
Adaptive Processor: A Model of Stream Processing
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pp. 144b
by
Shigeyuki Takano
Papers
Probabilistic Analysis of Fault Tolerance of FPGA Switch Block Array
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pp. 145a
by
Jing Huang
,
Mehdi B. Tahoori
,
Fabrizio Lombardi
Papers
Dynamic Reconfiguration for Management of Radiation-Induced Faults in FPGAs
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pp. 145b
by
Maya Gokhale
,
Paul Graham
,
Eric Johnson
,
Nathan Rollins
,
Michael Wirthlin
Papers
Dynamically Configurable Security for SRAM FPGA Bitstreams
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pp. 146a
by
Lilian Bossuet
,
Guy Gogniat
,
Wayne Burleson
Papers
RECASTER: Synthesis of Fault-Tolerant Embedded Systems Based on Dynamically Reconfigurable FPGAs
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pp. 146b
by
Christian F. da Silva
,
Alice M. Tokarnia
Papers
Adaptive System Architectures
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pp. 147a
by
Klaus Waldschmidt
Papers
Implementation of a HiperLAN/2 Receiver on the Reconfigurable Montium Architecture
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pp. 147b
by
Paul M. Heysters
,
Gerard K. Rauwerda
,
Gerard J. M. Smit
Papers
Mapping of Regular Nested Loop Programs to Coarse-Grained Reconfigurable Arrays — Constraints and Methodology
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pp. 148a
by
Frank Hannig
,
Hritam Dutta
,
Jürgen Teich
Papers
Overlapping Memory Operations with Circuit Evaluation in Reconfigurable Computing
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pp. 148b
by
Yosi Ben-Asher
,
Daniel Citron
,
Gadi Haber
Papers
A High-Performance and Energy-Efficient Architecture for Floating-Point Based LU Decomposition on FPGAs
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pp. 149a
by
Gokul Govindu
,
Seonil Choi
,
Viktor Prasanna
,
Vikash Daga
,
Sridhar Gangadharpalli
,
V. Sridhar
Papers
Analysis of High-Performance Floating-Point Arithmetic on FPGAs
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pp. 149b
by
Gokul Govindu
,
Ling Zhuo
,
Seonil Choi
,
Viktor Prasanna
Papers
Synthesizable Reconfigurable Array Targeting Distributed Arithmetic for System-on-Chip Applications
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pp. 150a
by
Sami Khawam
,
Tughrul Arslan
,
Fred Westall
Papers
Pipelined Multipliers for Reconfigurable Hardware
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pp. 150b
by
Mitchell J. Myjak
,
Jos? G. Delgado-Frias
Papers
Functional Programming for Reconfigurable Computing
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pp. 151a
by
Al Strelzoff
Papers
A Dynamically-Reconfigurable Image Recognition Processor
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pp. 151b
by
Kazuyuki Maruo
,
Masayoshi Ichikawa
,
Naoto Miyamoto
,
Leo Karnan
,
Takahiro Yamaguchi
,
Koji Kotani
,
Tadahiro Ohmi
Papers
MemMap-pd: Performance Driven Technology Mapping Algorithm for FPGAs with Embedded Memory Arrays
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pp. 152
by
A. Manoj Kumar
,
B Jayaram
,
R. Manimegalai
,
V. Kamakoti
Heterogeneous computing workshop
Freely available from IEEE.
pp. 99-100
WPDRTS 2004 technical program
Freely available from IEEE.
pp. 115-116
by
C. Gill
,
P. Narasimhan
Heuristic resource allocation algorithms for maximizing allowable workload in dynamic, distributed real-time systems
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pp. 117
by
D. Juedes
,
F. Drews
,
L. Welch
,
D. Fleeman
Reconfigurable architectures workshop
Freely available from IEEE.
pp. 131-131
Workshop on high-level parallel programming models & supportive environments
Freely available from IEEE.
pp. 153-153
Java for parallel and distributed computing workshop
Freely available from IEEE.
pp. 155-155
Workshop on nature inspired distributed computing
Freely available from IEEE.
pp. 161-161
Workshop on advances in parallel and distributed computational models - APDCM '04
Freely available from IEEE.
pp. 169-169
APDCM '04 - workshop organizers
Freely available from IEEE.
pp. 170-170
Workshop on communication architecture for clusters (CAC)
Freely available from IEEE.
pp. 181-181
Third IEEE international workshop on high performance computational biology (HiCOMB)
Freely available from IEEE.
pp. 187-187
Workshop organizers
Freely available from IEEE.
pp. 188-188
The next generation software program
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pp. 3 pp.
by
F. Darema
Workshop on fault-tolerant parallel and distributed systems
Freely available from IEEE.
pp. 205-205
Workshop introduction
Freely available from IEEE.
pp. 215-215
Messages from PDSEC-04 workshop chairs
Freely available from IEEE.
pp. 227-230
3rd International Workshop on Performance Modeling, Evaluation, and Optimization of Parallel and Distributed Systems (PME-PDS'04)
Freely available from IEEE.
pp. 241-243
Workshop on massively parallel processing
Freely available from IEEE.
pp. 257-257
Parallel and distributed systems: testing and debugging
Freely available from IEEE.
pp. 263-263
High-performance grid computing
Freely available from IEEE.
pp. 271-271
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