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International Parallel and Distributed Processing Symposium (IPDPS'03)   p. 189b
A High Performance VLIW Processor for Finite Field Arithmetic
C. Grabbe, University of Paderborn
M. Bednara, University of Paderborn
J. von zur Gathen, University of Paderborn
J. Shokrollahi, University of Paderborn
J. Teich, University of Paderborn

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DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/IPDPS.2003.1213351
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Abstract
Finite field arithmetic forms the mathematical basis for a variety of applications from the area of cryptography and coding. For finite fields of large extension degrees (as for cryptography), arithmetic operations are computation intensive and require dedicated hardware support under given timing constraints. We present a new architecture of a high performance VLIW processor that can perform basic field operations in parallel as well as complex instructions as needed for elliptic curve cryptography. The control path is microcoded, so the instruction set can easily be modified or extended. The modular data path structure along with an FPGA-optimized design facilitate adaption to various resource and timing requirements.
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Citation:  C. Grabbe, M. Bednara, J. von zur Gathen, J. Shokrollahi, J. Teich, "A High Performance VLIW Processor for Finite Field Arithmetic," ipdps, p. 189b,  International Parallel and Distributed Processing Symposium (IPDPS'03),  2003