Profiling Interrupt Handler Performance through Kernel Instrumentation

2003 IEEE International Conference on Computer Design (ICCD'03) p. 156
Profiling Interrupt Handler Performance through Kernel Instrumentation
Branden Moore, University of Notre Dame
Thomas Slabach, University of Notre Dame
Lambert Schaelicke, University of Notre Dame

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DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ICCD.2003.1240889
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Abstract
As a result of technology trends towards multi-gigahertz processors, the I/O system is becoming a critical bottleneck for many applications. Interrupts are a major aspect of most device drivers. Characterizing interrupt performance and its relation to architectural trends is important for understanding and improving I/O subsystem performance. Kernel instrumentation in combination with performance counters is able to overcome the limitations of microbenchmarks when measuring interrupts. A comparative analysis of a range of IA-32 based systems reveals that interrupt handler code exhibits only a low degree of instruction-level parallelism. Consequently, the trend towards deeper processor pipelines and smaller caches to maximize clock frequency can be detrimental to interrupt handling performance.
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Citation: Branden Moore, Thomas Slabach, Lambert Schaelicke, "Profiling Interrupt Handler Performance through Kernel Instrumentation," iccd, p. 156, 2003 IEEE International Conference on Computer Design (ICCD'03), 2003

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