| Abstract |
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In this tutorial we discuss concepts and techniques for the accurate and efficient modeling and extraction of interconnect parasitics in VLSI designs. Due to increasing operating frequencies, microwave-like effects will become important. Therefore stronger demands are put on extraction and verification tools. We indicate the state-of-the-art for capacitance, resistance and substrate resistance extraction and discuss some open problems. We also discuss several model reduction techniques as well as issues related to simulation and implementation in a CAD system.
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Additional Information
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Index Terms- Physical Design Verification, Interconnect Modeling, Interconnect Resistance Extraction, Interconnect Capacitance Extraction, Substrate Resistance Extraction
Citation:
N.P. Van der Meijs, T. Smedes,
"Accurate Interconnect Modeling: Towards Multi-million Transistor Chips As Microwave Circuits,"
iccad,
p. 244,
1996 International Conference on Computer-Aided Design (ICCAD '96),
1996
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