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2000 IEEE Symposium on Field-Programmable Custom Computing Machines   p. 267
Improving the Performance and Efficiency of an Adaptive Amplification Operation Using Configurable Hardware
Michael J. Wirthlin, Brigham Young University
Steve Morrison, Brigham Young University
Paul Graham, Brigham Young University
Brian Bray, Sandia National Laboratories

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DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/FPGA.2000.903414
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Abstract
An adaptive amplification operation has been designed and tested in configurable hardware for a computationally intensive object recognition system. This configurable system provides over forty-one times the throughput of an industry-standard embedded processor by exploiting the bandwidth of internal block memories and parallelism within the algorithm. Operating at less than one half the power of the programmable processor, the configurable approach performs the computation with 90 times less energy. The improvements in both performance and power are obtained by customizing the datapath, memory interfaces, and control to the amplification algorithm.
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Citation:  Michael J. Wirthlin, Steve Morrison, Paul Graham, Brian Bray, "Improving the Performance and Efficiency of an Adaptive Amplification Operation Using Configurable Hardware," fccm, p. 267,  2000 IEEE Symposium on Field-Programmable Custom Computing Machines,  2000