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Published Articles >> Table of Contents >> Abstract
2000 IEEE Symposium on Field-Programmable Custom Computing Machines
p. 3
Design of a VLIW Compute Accelerator on the Transmogrifier-2
L. Louis Zhang, University of Toronto
Qiang Wang, University of Toronto
David M. Lewis, University of Toronto
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DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/FPGA.2000.903387
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| Abstract |
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Design of FCCMs is an expensive and time-consuming process, requiring a specialized software and hardware design for each application. A new class of architecture and compiler for customized computers called PECompiler that can automatically generate both hardware and software for field-programmable compute accelerators was recently introduced. This paper presents the parameterized compute accelerator and example applications that have been compiled for it. A generic Very Long Instruction Word (VLIW) instruction set is defined for the proposed compute accelerator architecture. Hardware accelerators are designed and implemented for two application programs on the TM-2 based system. It is demonstrated that for these two application programs, the hardware accelerators can provide significant performance improvement over a general-purpose CPU.
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 Additional Information
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Citation:
L. Louis Zhang, Qiang Wang, David M. Lewis,
"Design of a VLIW Compute Accelerator on the Transmogrifier-2,"
fccm,
p. 3,
2000 IEEE Symposium on Field-Programmable Custom Computing Machines,
2000
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