Abstract
This paper presents a novel optimization methodology to implement parallel DSP algorithms based on the application of general multidimensional retiming techniques and graphic matroid theory. These methods improve the throughput of a synchronous circuit and guarantee that all functional elements work in parallel. This approach is also used to achieve full parallelism in multiprocessor architecture. Three multidimensional retiming methods: node, cocycle and cycle are introduced to assist the digital designer in DSP algorithms parallelization. The main theoretical advantage of this approach is a deeper formal treatment of the set of data dependences for the considered algorithms. This orientation also provides an intuitive tool for the graphical analysis and design of the corresponding systems, and a mathematical tool for analyzing and transforming (retiming) the involved algorithms. Application of these matrix optimization techniques to the optimal delay management problem for multidimensional DSP algorithms is also to be shown.