Abstract
This paper presents a reconfiguration mechanism for an on-chip interconnection scheme called Heterogeneous IP Block Interconnection (HIBI). Required memory structures and logical signal operations for the different configurations are explained.The possible applications for this kind of reconfiguration are discussed, including ways to enhance system performance, ease of design re-use, low power designs and fault tolerance. An overview of HIBI is given as a background information for the reader. The HIBI architecture is designed to exploit VHDL synthesis but the concept could conceivably be transferred to any synthesis environment.One way to utilize an interconnection network to its fullest is to make it as configurable as possible. If the communication profile between the various agents along the interconnection structure is known, it is possible to configure the interconnections to exhibit very good performance. In time, this communication profile may change and reconfiguration may become desirable.Reconfiguration can optimize the interconnection performance for a particular interconnection profile at run time. To solve the IP block interconnection problem with a flexible solution, taking into account the different performance requirements and the case specific preferences on design trade-offs, we have introduced the Heterogeneous IP Block