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Published Articles >> Table of Contents >> Abstract
Proceedings of the 22nd EUROMICRO Conference
p. 0600
Low-Power Embedded Microprocessor Design
C. Piguet, Centre Suisse d'Electronique et de Microtechnique SA, Neuchatel, Switzerland
T. Schneider, Centre Suisse d'Electronique et de Microtechnique SA, Neuchatel, Switzerland
J.-M. Masgonty, Centre Suisse d'Electronique et de Microtechnique SA, Neuchatel, Switzerland
C. Arm, Centre Suisse d'Electronique et de Microtechnique SA, Neuchatel, Switzerland
S. Durand, Centre Suisse d'Electronique et de Microtechnique SA, Neuchatel, Switzerland
M. Stegers, Centre Suisse d'Electronique et de Microtechnique SA, Neuchatel, Switzerland
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DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/EURMIC.1996.546487
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Abstract: Low-power consumption has emerged as a very important issue in the design of integrated circuits in CMOS technology. The basic idea behind low-power RISC-like architectures is to reduce the number of executed instructions and clock cycles for the execution of a given task. In addition to these architectural issues, important power savings have been obtained by lowering the supply voltage, by pipelining, by adopting gated clock techniques as well as by using hierarchical memories.
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 Additional Information
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Index Terms- microprocessor chips; low-power embedded microprocessor design; CMOS technology; low-power RISC-like architectures; clock cycles; power savings; gated clock techniques; hierarchical memories
Citation:
C. Piguet, T. Schneider, J.-M. Masgonty, C. Arm, S. Durand, M. Stegers,
"Low-Power Embedded Microprocessor Design,"
euromicro,
p. 0600,
Proceedings of the 22nd EUROMICRO Conference,
1996
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