Abstract
The paper describes a parallel genetic algorithm for the VLSI implementation of real-time GPS attitude determination systems. The genetic algorithm is based on a fine-grained model and utilises AFM (Ambiguity Function Method) for GPS attitude determination. The paper describes various implementation choices with for the genetic algorithm in order to achieve both functionality and practical performance constraints such as speed, compactness and scalability. Simulation results using GPS carrier phase experimental data show that, in addition to low hardware complexity, our final genetic algorithm architecture achieves a linear speed-up with the number of processors utilised in the target VLSI chip.