Published Articles >> Table of Contents >> Abstract

The Third NASA/DoD Workshop on Evolvable Hardware   p. 0172
A Cmos Fpta Chip For Intrinsic Hardware Evolution Of Analog Electronic Circuits
Jorg Langeheine, Heidelberg University
Joachim Becker, Heidelberg University
Simon Foiling, Heidelberg University
Karlheinz Meier, Heidelberg University
Johannes Schemmel, Heidelberg University

Full Article Text:

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/EH.2001.937959
Send link to a friend

Abstract
Abstract: This paper describes and discusses an intrinsic approach to hardware evolution of analog electronic circuits using a Field Programmable Transistor Array (FPTA). The FPTA is fabricated in a 0.6 μ.m CMOS process and consists of 16 x 16 transistor cells. The chip allows to configure the gate geometry as well as the connectivity of each of the 256 transistors. Evolutionary algorithms are to be run on a commercial PC to produce the new circuit configurations that are downloaded to the chip via a PCI card. In contrast to extrinsic hardware evolution all environmental conditions present on the device under test have to be taken into account by the evolutionary algorithm. Thus a selection pressure is raised towards solutions that actually work on real dice.
Back to Top Additional Information
Citation:  Jorg Langeheine, Joachim Becker, Simon Foiling, Karlheinz Meier, Johannes Schemmel, "A Cmos Fpta Chip For Intrinsic Hardware Evolution Of Analog Electronic Circuits," eh, p. 0172,  The Third NASA/DoD Workshop on Evolvable Hardware,  2001