At-Speed Functional Verification of Programmable Devices

Nicola Bombieri; Franco Fummi; Graziano Pravadelli

doi:10.1109/DFT.2004.13

19th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, 2004. DFT 2004. Proceedings.

At-Speed Functional Verification of Programmable Devices

Year: 2004, Pages: 386-394

DOI Bookmark: 10.1109/DFT.2004.13

Authors

Nicola Bombieri, Universit? di Verona
Franco Fummi, Universit? di Verona
Graziano Pravadelli, Universit? di Verona

Abstract

In this paper we present a novel approach for functional verification of programmable devices. The proposed methodology is suited to refine the results obtained by a functional Automatic Test Pattern Generator (ATPG). The hard-to-detect faults are examined by exploiting the controllability ability of a high-level ATPG in conjunction with the observability potentiality of software instructions targeted to the programmable device. Generated test programs can be used for both functional verification and at-speed testing.

Like what you’re reading?

Already a member?

Get this article FREE with a new membership!

At-speed functional verification of programmable devices
19th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, 2004. DFT 2004. Proceedings.
Redundant functional faults reduction by saboteurs synthesis [logic verification]
Eighth IEEE International High-Level Design Validation and Test Workshop
Software Fault Tolerance: The Evaluation by Functional Verification
2015 Euromicro Conference on Digital System Design (DSD)
An FPGA-based Random Functional Verification Method for Cache
2013 IEEE 8th International Conference on Networking, Architecture, and Storage (NAS)
Functional verification based on the EFSM model
Proceedings. Ninth IEEE International High-Level Design Validation and Test Workshop (IEEE Cat. No.04EX940)
VERIFUL: VERIfication using FUnctional Learning
European Design and Test Conference
An Integrated Functional Verification Tool for FPGA Systems
2007 Second International Conference on Innovative Computing, Information and Control
A CLP-Based Functional ATPG for Extended FSMs
2007 Eighth International Workshop on Microprocessor Test and Verification
Commercial Design Verification: Methodology and Tools
Proceedings International Test Conference 1996. Test and Design Validity

At-Speed Functional Verification of Programmable Devices

Authors

Abstract

Related Articles