Heterogeneous Redundancy for Fault and Defect Tolerance with Complexity Independent Area Overhead

18th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT'03) p. 571
Heterogeneous Redundancy for Fault and Defect Tolerance with Complexity Independent Area Overhead
Vinu Vijay Kumar, University of Virginia
John Lach, University of Virginia

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DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/DFTVS.2003.1250157
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Abstract
The continuous increase in digital system complexity is raising the area cost of redundancy-based fault and defect tolerance. This paper introduces a technique for heterogeneous redundancy in control path and datapath circuitry that provides high reliability with area overhead that is independent of system complexity. Small amounts of circuit-specific reconfigurable logic are finely integrated with fixed-logic circuitry to provide fine-grained heterogeneous fault and defect tolerance. Results reveal that the technique is effective for a variety of circuits, providing high reliability with a constant magnitude area overhead that is independent of system complexity.
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Citation: Vinu Vijay Kumar, John Lach, "Heterogeneous Redundancy for Fault and Defect Tolerance with Complexity Independent Area Overhead," dft, p. 571, 18th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT'03), 2003

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