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Published Articles >> Table of Contents >> Abstract
Design, Automation and Test in Europe Conference and Exhibition (DATE'03)
p. 10608
High Speed and Highly Testable Parallel Two-Rail Code Checker
Martin Omana, University of Bologna
Daniele Rossi, University of Bologna
Cecilia Metra, University of Bologna
Full Article Text:
 
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/DATE.2003.10078
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In this article we propose a high speed and highly testable parallel two-rail code checker, which features a compact structure and is Totally-Self-Checking or Strongly Code-Disjoint with respect to a wide set of realistic faults. The proposed checker is also particularly suitable to implement embedded two-rail code checkers, as it requires only two input codewords for fault detection. Our checker can be employed to check the correct operation of a connected functional block using the two-rail code, to implement the output two-rail code checker of "normal" checkers for un-ordered codes, or to join together the error messages produced by various checkers (possibly using different codes) present within the same self-checking system. The behavior of our checker has been verified by means of electrical level simulations (performed using HSPICE), considering both nominal values and statistical variations of electrical parameters.
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Citation:
Martin Omana, Daniele Rossi, Cecilia Metra,
"High Speed and Highly Testable Parallel Two-Rail Code Checker,"
date,
p. 10608,
Design, Automation and Test in Europe Conference and Exhibition (DATE'03),
2003
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