| Abstract |
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In this paper, we give an overview of the trade-off to improve yield and optimize silicon-manufacturing cost. The specific technology focus is on large embedded memories in complex ASIC or system-on-chip designs. Embedded capabilities for test; redundancy analysis and repair are shown as design-for-manufacturability features needed for large embedded memories in VDSM design.
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 Additional Information
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Index Terms- Yield improvement, DFM, BIST, silicon repair
Citation:
Yervant Zorian,
"Yield Improvement and Repair Trade-Off for Large Embedded Memories,"
date,
p. 69,
Design, Automation and Test in Europe (DATE '00),
2000
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