Abstract
Analog circuits within mostly digital VLSI systems must operate from low voltage and dissipate as low power as possible, due to the large number of digital gates employed in most of applications, mainly in ASIC's. Paramount to the systems integration issue is the shortening of the design cycle and the quick turn around time for fabrication. Semi-custom ASIC's using the SOT concept were introduced recently, where the interconnections are placed over the active region leading to flexible designs and effective use of chip area. The SOT offers both short design time and good cost-performance compromise. The challenge then becomes the designing of analog circuits in a conventional gate-isolation digital SOT matrix. The mixed digital/analog circuits design in a fixed digital architecture of minimum length MOS transistors presents considerable difficulties. Considering some specific techniques, in this paper it is shown possible to obtain analog circuits with good performance. It is shown by measurement results of the OTA's designed in 1.0(m CMOS digital technology implemented in two different methodologies: in a fixed-size transistors array and in a full-custom design. Several characteristic parameters of OTA's amplifiers are measured and compared with HSpice electrical simulation results.