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Published Articles >> Table of Contents >> Abstract
15th International Conference on Electronics, Communications and Computers (CONIELECOMP'05)
pp. 100-105
Output Voltage Effects in a 2x2 SMC Caused by Time Index Change
Daniel Ortega, Universidad de las Américas-Puebla
Salvador Revelo, Universidad de las Américas-Puebla
José Mariano Fernández, Universidad de las Américas-Puebla
Pedro Bañuelos, Universidad de las Américas-Puebla
Full Article Text:
  
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/CONIEL.2005.57
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| Abstract |
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A Stacked Multicell Converter (SMC) is an
inverter specially adapted to high voltage applications.
This inverter is composed by commutation cells
ordered in p rows and n stacks, reducing
semiconductors commutation stresses and high
operation frequencies can be reached [2, 3]. This
structure requires 2(pxn) switches to generate an
output signal similar to a sinusoidal waveform.
However, the switches must be correctly controlled.
The most commonly used control technique has been
the typical PWM [1, 4, 5]. However, it is possible to
generate a control scheme by FPGA technology. So, the
control signals are established by the designer. This
kind of control has been called Patron Control Signals
[6]. In this paper, a complete mathematical analysis to
the output voltage behavior for a 2x2 SMC, when the
time index (β) changes, is presented. In addition,
simulations results are shown to validate the
mathematical analysis.
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 Additional Information
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Index Terms- Multilevel converters, SMC (Stacked Multicell Converter), Time Index (β), NPC (Neutral Point Clamp), PWM
Citation:
Daniel Ortega, Salvador Revelo, José Mariano Fernández, Pedro Bañuelos,
"Output Voltage Effects in a 2x2 SMC Caused by Time Index Change,"
conielecomp,
pp. 100-105,
15th International Conference on Electronics, Communications and Computers (CONIELECOMP'05),
2005
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