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11th Asian Test Symposium (ATS'02)   p. 417
CMOS Floating Gate Defect Detection Using I DDQ Test with DC Power Supply
Hiroyuki Michinishi, Okayama University of Science
Tokumi Yokohira, Okayama University
Takuji Okamoto, Okayama University of Science
Toshifumi Kobayashi, Mitsubishi Electric Co.
Tsutomu Hondo, Sharp Takaya Electronics Industry Co.,Ltd.

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DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ATS.2002.1181747
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Abstract
In this paper, we propose a new IDDQ test method for detecting floating gate defects in CMOS ICs. In the method, unusual increase of the supply current caused by defects is promoted by superposing an AC component on the DC power supply. Feasibility of the test is examined by some experiments on four DUTs with an intentionally caused defect. The results showed that our method could detect clearly all the defects, one of which may be detected by nei-ther any functional logic test nor any conventional IDDQ test.
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Citation:  Hiroyuki Michinishi, Tokumi Yokohira, Takuji Okamoto, Toshifumi Kobayashi, Tsutomu Hondo, "CMOS Floating Gate Defect Detection Using I DDQ Test with DC Power Supply," ats, p. 417,  11th Asian Test Symposium (ATS'02),  2002