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10th Asian Test Symposium (ATS'01)   p. 338
On Test and Characterization of Analog Linear Time-Invariant Circuits Using Neural Networks
Zhen Guo, New Jersey Institute of Technology
Xi Min Zhang, New Jersey Institute of Technology
Jacob Savir, New Jersey Institute of Technology
Yun-Qing Shi, New Jersey Institute of Technology

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DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ATS.2001.990306
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Abstract
Testing and characterization of analog circuits is a very important task in the VLSI manufacturing process. However, no efficient methodology exists on how to effectively model and characterize the various faults, and even how to dectect their existence. Neural networks have been successfully applied to various pattern recognition problems. In this paper, the amplitude and temporal characteristics of the good circuit response are used to train a neural network, so that it is able to distinguish between different faulty circuit responses. A Time-Delay Neural Network (TDNN) is proposed as a possible vehicle for performing the test and diagnosis.
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Index Terms- Neural Network, Fault Detection, Charecterization, System on a Chip Citation:  Zhen Guo, Xi Min Zhang, Jacob Savir, Yun-Qing Shi, "On Test and Characterization of Analog Linear Time-Invariant Circuits Using Neural Networks," ats, p. 338,  10th Asian Test Symposium (ATS'01),  2001