Advanced Search
CS Search Google Search
Subscribers, please login

Published Articles >> Table of Contents >> Abstract

Seventh Asian Test Symposium (ATS'98)   p. 413
Design and Simulation of a RISC-Based 32-bit Embedded On-Board Computer

Full Article Text: Download PDF of full textBuy this articleGet full text from IEEE Xplore

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ATS.1998.741649
Send link to a friend

Abstract
This paper presents the design and simulation method for developing a RISC-based 32-bit embedded on-board computer. Instead of the conventional bread-boarded prototype:(1) we used the Cadence EDA environment and Logic Modeling hardware simulator to verify the conceptual design (2) An Aptix FPCB was used to implement the first-version hardware system. (3) a simple but effective self-made ICE (In- circuit Emulator) was used to perform target system verification while software was running on IDT 79S381 Evaluation Board. The whole hardware system was first simulated conceptually under EDA environment, and then was simulated with the basic software codes. This method is effective in an embedded system design.
Additional Information
Index Terms- Design, Simulation, EDA, RISC, Embedded System, Hardware/Software

Citation:  Zhen Guo, He Li, Shuling Guo, Dongsheng Wang, "Design and Simulation of a RISC-Based 32-bit Embedded On-Board Computer," ats, p. 413,  Seventh Asian Test Symposium (ATS'98),  1998

Similar Articles

Abstract Contents
Abstract
Index Terms
Citation




Free access to

  • Abstracts
  • Selected PDFs

Electronic subscribers login to:

  • Access HTML/PDFs of full text articles

Subscription information

Get a Web account

PDFs require Adobe Acrobat Reader.

Peer Review Notice

Give us Feedback