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Published Articles >> Table of Contents >> Abstract
Ninth IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC'03)
p. 98
Monotonic Circuits with Complete Acknowledgement
Nikolai Starodoubtsev, Tokyo University of Social Welfare
Sergei Bystrov, Russian Academy of Science
Alex Yakovlev, University of Newcastle upon Tyne
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DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ASYNC.2003.1199170
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| Abstract |
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The paper studies a class of asynchronous circuits in which every signal transition on the inputs of every gate is acknowledged during the circuit operation. This property is called complete acknowledgement (CA) and it is considered here for circuits that consist of gates described by monotonic boolean functions only.In order to implement such circuits the standard CMOS designs of 2-input logic gates are modified by using an additional output for CA. The paper investigates the behavioral properties of monotonic CA (MCA) circuits and the feasibility of a behavioral specification to be refined to a CA-implementable form. The result
of comparison of a number of CA realizations with their speed-independent counterparts produced by negative gate synthesis inspires optimism about the practicality of CA circuits. Being particularly robust to variations in technological parameters, e.g. the value and type of delay and switching thresholds, such circuits offer potential advantages for future CMOS designs.
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 Additional Information
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Citation:
Nikolai Starodoubtsev, Sergei Bystrov, Alex Yakovlev,
"Monotonic Circuits with Complete Acknowledgement,"
async,
p. 98,
Ninth IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC'03),
2003
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