Two-Phase Asynchronous Pipeline Control

S.S. Appleton; S.V. Morton; M.J. Liebelt

doi:10.1109/ASYNC.1997.587140

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Proceedings Third International Symposium on Advanced Research in Asynchronous Circuits and Systems

Two-Phase Asynchronous Pipeline Control

Year: 1997, Pages: 12

DOI Bookmark: 10.1109/ASYNC.1997.587140

Authors

S.S. Appleton, Dept. of Electr. & Electron. Eng., Adelaide Univ., SA, Australia
S.V. Morton, Dept. of Electr. & Electron. Eng., Adelaide Univ., SA, Australia
M.J. Liebelt, Dept. of Electr. & Electron. Eng., Adelaide Univ., SA, Australia

Abstract

In this paper the potential speed and power efficiency of two-phase asynchronous systems operating under a bounded-delay model are explored. It is shown that two-phase bounded-delay systems can significantly outperform four-phase approaches published to date. The design of a prototype microprocessor using this two-phase approach is then described, and preliminary results are presented.

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