Proceedings Second Working Conference on Asynchronous Design Methodologies
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Abstract

We point out deficiencies of previous treatments of liveness. We define a new liveness condition in two forms: one based on finite trace theory and the other on automata. We prove the equivalence of these two forms. We introduce a safety condition and derive modular and hierarchical verification theorems for both safety and liveness. Finally, we give an algorithm for verifying liveness.
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